Here is a list of all documented class members with links to the class documentation for each member:

- r -

• range_lut() : util::range_lut< T >
• rbr : ahb::pe::ahb_initiator_b, axi::pe::axi_initiator_b
• rd_addr_accept_delay : ahb::pe::ahb_target_b, axi::pe::axi_target_pe
• rd_bw_limit_byte_per_sec : axi::pe::rate_limiting_buffer
• rd_data_accept_delay : axi::pe::simple_initiator_b
• rd_data_beat_delay : ahb::pe::ahb_target_b, axi::pe::axi_target_pe
• rd_data_interleaving : axi::pe::axi_target_pe
• rd_req2resp_fifo : axi::pe::rate_limiting_buffer, axi::pe::replay_buffer
• rd_resp_delay : ahb::pe::ahb_target_b, axi::pe::ace_target_pe, axi::pe::axi_target_pe, axi::pe::rate_limiting_buffer, scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >
• rd_resp_fifo : axi::pe::rate_limiting_buffer, axi::pe::replay_buffer
• rdmask : scc::impl::sc_register< DATATYPE >
• re_arm() : util::watchdog
• react() : axi::fsm::base
• read() : scc::dmi_mgr< TYPES >, scc::impl::sc_register< DATATYPE >
• read_dbg() : scc::bitfield_register< datatype_t >, scc::impl::sc_register< DATATYPE >, scc::resource_access_if
• recordBeginTx() : tlm::scc::lwtr::lwtr4tlm2_extension_registry_if< TYPES >, tlm::scc::scv::tlm_extensions_recording_if< TYPES >
• recordEndTx() : tlm::scc::lwtr::lwtr4tlm2_extension_registry< TYPES >, tlm::scc::lwtr::lwtr4tlm2_extension_registry_if< TYPES >, tlm::scc::scv::tlm_extension_recording_registry< TYPES >, tlm::scc::scv::tlm_extensions_recording_if< TYPES >
• register_b_transport() : tlm::nw::target_mixin< BASE_TYPE, REQUESTOR, TYPES >, tlm::scc::tagged_target_mixin< base_type, TYPES >, tlm::scc::target_mixin< BASE_TYPE, TYPES >
• register_get_direct_mem_ptr() : tlm::nw::target_mixin< BASE_TYPE, REQUESTOR, TYPES >, tlm::scc::tagged_target_mixin< base_type, TYPES >, tlm::scc::target_mixin< BASE_TYPE, TYPES >
• register_invalidate_direct_mem_ptr() : tlm::nw::initiator_mixin< BASE_TYPE, TYPES >, tlm::scc::initiator_mixin< BASE_TYPE, TYPES >, tlm::scc::tagged_initiator_mixin< BASE_TYPE, TYPES >
• register_nb_transport() : tlm::scc::signal_initiator_mixin< BASE_TYPE >, tlm::scc::signal_target_mixin< BASE_TYPE >
• register_nb_transport_bw() : tlm::nw::initiator_mixin< BASE_TYPE, TYPES >, tlm::scc::initiator_mixin< BASE_TYPE, TYPES >, tlm::scc::tagged_initiator_mixin< BASE_TYPE, TYPES >
• register_nb_transport_fw() : tlm::nw::target_mixin< BASE_TYPE, REQUESTOR, TYPES >, tlm::scc::tagged_target_mixin< base_type, TYPES >, tlm::scc::target_mixin< BASE_TYPE, TYPES >
• register_resource() : scc::resetable
• register_transport_dbg() : tlm::nw::target_mixin< BASE_TYPE, REQUESTOR, TYPES >, tlm::scc::tagged_target_mixin< base_type, TYPES >, tlm::scc::target_mixin< BASE_TYPE, TYPES >
• release() : scc::ordered_semaphore::lock, tlm::nw::tlm_network_payload_base
• removeEntry() : util::range_lut< T >
• reordering_target() : axi::pe::reordering_target< BUSWIDTH, TYPES, N, POL >
• replay_target() : axi::pe::replay_target< BUSWIDTH, TYPES, N, POL >
• reporting_level() : logging::Log< T >
• reportOnlyFirstError() : scc::LogConfig
• request() : axi::request
• res_val : scc::impl::sc_register< DATATYPE >
• reset() : axi::axi_extension< REQ, RESP >, axi::common, axi::fsm::fsm_handle, axi::request, axi::response, nonstd::optional< T >, nonstd::optional< T & >, scc::bitfield_register< datatype_t >, scc::impl::sc_register< DATATYPE >, scc::resource_access_if, scc::stream_redirection, tlm::nw::tlm_network_payload_base
• reset_start() : scc::resetable
• reset_stop() : scc::resetable
• resize() : util::pool_allocator< ELEM_SIZE, CHUNK_SIZE >, util::ring_buffer< T >
• ring_buffer() : util::ring_buffer< T >
• rla : axi::pe::axi_initiator_b
• router() : scc::router< BUSWIDTH, TARGET_SOCKET_TYPE >