scc 2025.09
SystemC components library
scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES > Class Template Reference

simple TLM2.0 LT memory model More...

#include <memory.h>

Inheritance diagram for scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >:
Collaboration diagram for scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >:

Classes

struct  host_map_entry

Public Types

using delay_type = typename delay_spec_type<USE_CYCLES>::type

Public Member Functions

 memory (const sc_core::sc_module_name &nm)
void set_operation_callback (std::function< int(memory< SIZE, BUSWIDTH > &, tlm::tlm_generic_payload &, sc_core::sc_time &delay)> cb)
 allows to register a callback or functor being invoked upon an access to the memory
void set_dmi_callback (std::function< bool(memory< SIZE, BUSWIDTH > &, tlm::tlm_generic_payload &, tlm::tlm_dmi &)> cb)
 allows to register a callback or functor being invoked upon a direct memory access (DMI) to the memory
void map_host_memory (uint64_t base, uint64_t size, uint8_t *ptr)
 maps a given memory into the address range of the TLM memory
void unmap_host_memory (uint64_t base, uint64_t size)
 unmpas a host memory mapped into the address range of the TLM memory
int handle_operation (tlm::tlm_generic_payload &trans, sc_core::sc_time &delay)
 ! handle the memory operation independent on interface function used
bool handle_dmi (tlm::tlm_generic_payload &gp, tlm::tlm_dmi &dmi_data)
 handle the dmi functionality

Static Public Member Functions

static constexpr unsigned long long getPageSize ()
static constexpr unsigned long long getSize ()
 return the size of the array

Public Attributes

tlm::scc::target_mixin< tlm::tlm_target_socket< BUSWIDTH > > target {"ts"}
 the target socket to connect to TLM
cci::cci_param< bool > allow_dmi {"allow_dmi", true, "Allow DMI accesses to this memory if set"}
 allow DMI accesses
cci::cci_param< delay_type > rd_resp_delay {"rd_resp_delay", delay_spec_type<USE_CYCLES>::get_default_val()}
 read response delay in cycles if USE_CYCLES==true else in sc_core::sc_time
cci::cci_param< delay_type > wr_resp_delay {"wr_resp_delay", delay_spec_type<USE_CYCLES>::get_default_val()}
 write response delay in cycles if USE_CYCLES==true else in sc_core::sc_time
std::function< int(memory< SIZE, BUSWIDTH > &, tlm::tlm_generic_payload &, sc_core::sc_time &delay)> operation_cb
std::function< bool(memory< SIZE, BUSWIDTH > &, tlm::tlm_generic_payload &, tlm::tlm_dmi &)> dmi_cb

Protected Member Functions

void set_clock_period (sc_core::sc_time period)

Protected Attributes

util::sparse_array< uint8_t, SIZE, PAGE_ADDR_BITS > mem
 the real memory structure
util::range_lut< host_map_entryhost_mem_lut {host_map_entry{nullptr, 0, 0}}
sc_core::sc_time clk_period

Detailed Description

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
class scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >

simple TLM2.0 LT memory model

This model uses the util::sparse_array as backing store. Therefore it can have an arbitrary size since only pages for accessed addresses are allocated. it is possible to map specific host memory ranges to a target memory range. For this the scc::host_mem_map_extension hs to be used in conjunction with the TLM_IGNORE_COMMAND. The extension carries the pointer to the host memory to be used while the generic payload address and length indicate the size of the memory block

TODO: add some more parameters to configure allowed access types (rw, read only)

Template Parameters
SIZEsize of the memery
BUSWIDTHbus width of the socket

Definition at line 70 of file memory.h.

Member Typedef Documentation

◆ delay_type

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
using scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::delay_type = typename delay_spec_type<USE_CYCLES>::type

Definition at line 72 of file memory.h.

Constructor & Destructor Documentation

◆ memory()

template<unsigned long long SIZE, unsigned BUSWIDTH, unsigned PAGE_ADDR_BITS, bool USE_CYCLES>
scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::memory ( const sc_core::sc_module_name & nm)

constructor with explicit instance name

Parameters
nm

implementation details ///////////////////////////////////////////////////////////////////////////

Definition at line 197 of file memory.h.

Member Function Documentation

◆ getPageSize()

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
constexpr unsigned long long scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::getPageSize ( )
inlinestaticconstexpr

Definition at line 87 of file memory.h.

◆ getSize()

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
constexpr unsigned long long scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::getSize ( )
inlinestaticconstexpr

return the size of the array

Definition at line 93 of file memory.h.

◆ handle_dmi()

template<unsigned long long SIZE, unsigned BUSWIDTH, unsigned PAGE_ADDR_BITS, bool USE_CYCLES>
bool scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::handle_dmi ( tlm::tlm_generic_payload & gp,
tlm::tlm_dmi & dmi_data )
inline

handle the dmi functionality

Definition at line 312 of file memory.h.

◆ handle_operation()

template<unsigned long long SIZE, unsigned BUSWIDTH, unsigned PAGE_ADDR_BITS, bool USE_CYCLES>
int scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::handle_operation ( tlm::tlm_generic_payload & trans,
sc_core::sc_time & delay )

! handle the memory operation independent on interface function used

Definition at line 221 of file memory.h.

◆ map_host_memory()

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
void scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::map_host_memory ( uint64_t base,
uint64_t size,
uint8_t * ptr )
inline

maps a given memory into the address range of the TLM memory

Parameters
basebase address where the memory shall be mapped
sizesize of the memory range to map
ptrpointer to the mapped host memory

Definition at line 131 of file memory.h.

◆ set_clock_period()

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
void scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::set_clock_period ( sc_core::sc_time period)
inlineprotected

Definition at line 163 of file memory.h.

◆ set_dmi_callback()

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
void scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::set_dmi_callback ( std::function< bool(memory< SIZE, BUSWIDTH > &, tlm::tlm_generic_payload &, tlm::tlm_dmi &)> cb)
inline

allows to register a callback or functor being invoked upon a direct memory access (DMI) to the memory

Parameters
cbthe callback function or functor

Definition at line 109 of file memory.h.

◆ set_operation_callback()

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
void scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::set_operation_callback ( std::function< int(memory< SIZE, BUSWIDTH > &, tlm::tlm_generic_payload &, sc_core::sc_time &delay)> cb)
inline

allows to register a callback or functor being invoked upon an access to the memory

Parameters
cbthe callback function or functor

Definition at line 100 of file memory.h.

◆ unmap_host_memory()

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
void scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::unmap_host_memory ( uint64_t base,
uint64_t size )
inline

unmpas a host memory mapped into the address range of the TLM memory

Parameters
basebase address where the memory shall be mapped
sizesize of the memory range to map

Definition at line 145 of file memory.h.

Member Data Documentation

◆ allow_dmi

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
cci::cci_param<bool> scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::allow_dmi {"allow_dmi", true, "Allow DMI accesses to this memory if set"}

allow DMI accesses

Definition at line 114 of file memory.h.

◆ clk_period

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
sc_core::sc_time scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::clk_period
protected

Definition at line 164 of file memory.h.

◆ dmi_cb

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
std::function<bool(memory<SIZE, BUSWIDTH>&, tlm::tlm_generic_payload&, tlm::tlm_dmi&)> scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::dmi_cb

Definition at line 172 of file memory.h.

◆ host_mem_lut

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
util::range_lut<host_map_entry> scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::host_mem_lut {host_map_entry{nullptr, 0, 0}}
protected

Definition at line 161 of file memory.h.

◆ mem

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
util::sparse_array<uint8_t, SIZE, PAGE_ADDR_BITS> scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::mem
protected

the real memory structure

Definition at line 153 of file memory.h.

◆ operation_cb

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
std::function<int(memory<SIZE, BUSWIDTH>&, tlm::tlm_generic_payload&, sc_core::sc_time& delay)> scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::operation_cb

Definition at line 171 of file memory.h.

◆ rd_resp_delay

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
cci::cci_param<delay_type> scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::rd_resp_delay {"rd_resp_delay", delay_spec_type<USE_CYCLES>::get_default_val()}

read response delay in cycles if USE_CYCLES==true else in sc_core::sc_time

Definition at line 118 of file memory.h.

◆ target

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
tlm::scc::target_mixin<tlm::tlm_target_socket<BUSWIDTH> > scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::target {"ts"}

the target socket to connect to TLM

Definition at line 75 of file memory.h.

◆ wr_resp_delay

template<unsigned long long SIZE, unsigned BUSWIDTH = LT, unsigned PAGE_ADDR_BITS = 24, bool USE_CYCLES = false>
cci::cci_param<delay_type> scc::memory< SIZE, BUSWIDTH, PAGE_ADDR_BITS, USE_CYCLES >::wr_resp_delay {"wr_resp_delay", delay_spec_type<USE_CYCLES>::get_default_val()}

write response delay in cycles if USE_CYCLES==true else in sc_core::sc_time

Definition at line 122 of file memory.h.


The documentation for this class was generated from the following file:
  • /home/eyck/Projects/MINRES/SystemC-Components/src/components/scc/memory.h