scc 2025.09
SystemC components library
axi::pe::rate_limiting_buffer Class Reference
Inheritance diagram for axi::pe::rate_limiting_buffer:
Collaboration diagram for axi::pe::rate_limiting_buffer:

Public Member Functions

 rate_limiting_buffer (const sc_core::sc_module_name &nm, cci::cci_param< int > &rd_resp_delay, cci::cci_param< int > &wr_resp_delay)
void transport (tlm::tlm_generic_payload &payload, bool lt_transport=false) override
void snoop_resp (tlm::tlm_generic_payload &payload, bool sync=false) override

Public Attributes

sc_core::sc_in< bool > clk_i {"clk_i"}
sc_core::sc_export< tlm::scc::pe::intor_fw_nbfw_i {"fw_i"}
sc_core::sc_port< tlm::scc::pe::intor_bw_nb, 1, sc_core::SC_ZERO_OR_MORE_BOUND > bw_o {"bw_o"}
cci::cci_param< int > & rd_resp_delay
 the latency between request and response phase. Will be overwritten by the return of the callback function (if registered) -> RIV
cci::cci_param< int > & wr_resp_delay
 the latency between request and response phase. Will be overwritten by the return of the callback function (if registered) -> BV
cci::cci_param< double > rd_bw_limit_byte_per_sec {"rd_bw_limit_byte_per_sec", -1.0}
 the bandwidth limit for read accesses. A value of -1 disables the limiting
cci::cci_param< double > wr_bw_limit_byte_per_sec {"wr_bw_limit_byte_per_sec", -1.0}
 the bandwidth limit for write accesses. A value of -1 disables the limiting
cci::cci_param< double > total_bw_limit_byte_per_sec {"total_bw_limit_byte_per_sec", -1.0}
 the bandwidth limit for read accesses. A value of -1 disables the limiting

Protected Member Functions

void end_of_elaboration () override
void start_of_simulation () override
void process_req2resp_fifos ()
void start_rd_resp_thread ()
void start_wr_resp_thread ()

Protected Attributes

sc_core::sc_clock * clk_if {nullptr}
sc_core::sc_time time_per_byte_rd
sc_core::sc_time time_per_byte_wr
sc_core::sc_time time_per_byte_total
scc::fifo_w_cb< std::tuple< tlm::tlm_generic_payload *, unsigned > > rd_req2resp_fifo {"rd_req2resp_fifo"}
 queues realizing the min latency
scc::fifo_w_cb< std::tuple< tlm::tlm_generic_payload *, unsigned > > wr_req2resp_fifo {"wr_req2resp_fifo"}
scc::fifo_w_cb< tlm::tlm_generic_payload * > rd_resp_fifo {"rd_resp_fifo"}
 queues to handle bandwidth limit
scc::fifo_w_cb< tlm::tlm_generic_payload * > wr_resp_fifo {"wr_resp_fifo"}
scc::ordered_semaphore total_arb {1}
double total_residual_clocks {0.0}

Detailed Description

Definition at line 27 of file ordered_target.h.

Constructor & Destructor Documentation

◆ rate_limiting_buffer()

axi::pe::rate_limiting_buffer::rate_limiting_buffer ( const sc_core::sc_module_name & nm,
cci::cci_param< int > & rd_resp_delay,
cci::cci_param< int > & wr_resp_delay )

Definition at line 5 of file ordered_target.cpp.

Member Function Documentation

◆ end_of_elaboration()

void axi::pe::rate_limiting_buffer::end_of_elaboration ( )
overrideprotected

Definition at line 20 of file ordered_target.cpp.

◆ process_req2resp_fifos()

void axi::pe::rate_limiting_buffer::process_req2resp_fifos ( )
protected

Definition at line 49 of file ordered_target.cpp.

◆ snoop_resp()

void axi::pe::rate_limiting_buffer::snoop_resp ( tlm::tlm_generic_payload & payload,
bool sync = false )
inlineoverridevirtual

send a response to a backward transaction if not immediately answered

Parameters
payloadobject with (optional) extensions
syncif true send with next rising clock edge of the pe otherwise send it immediately

Implements tlm::scc::pe::intor_fw< type::NB >.

Definition at line 74 of file ordered_target.h.

◆ start_of_simulation()

void axi::pe::rate_limiting_buffer::start_of_simulation ( )
overrideprotected

Definition at line 22 of file ordered_target.cpp.

◆ start_rd_resp_thread()

void axi::pe::rate_limiting_buffer::start_rd_resp_thread ( )
protected

Definition at line 72 of file ordered_target.cpp.

◆ start_wr_resp_thread()

void axi::pe::rate_limiting_buffer::start_wr_resp_thread ( )
protected

Definition at line 101 of file ordered_target.cpp.

◆ transport()

void axi::pe::rate_limiting_buffer::transport ( tlm::tlm_generic_payload & payload,
bool lt_transport = false )
overridevirtual

execute the transport of the payload. Independent of the underlying layer this function is blocking

Parameters
payloadobject with (optional) extensions
lt_transportuse b_transport instead of nb_transport*

Implements tlm::scc::pe::intor_fw< type::NB >.

Definition at line 42 of file ordered_target.cpp.

Member Data Documentation

◆ bw_o

sc_core::sc_port<tlm::scc::pe::intor_bw_nb, 1, sc_core::SC_ZERO_OR_MORE_BOUND> axi::pe::rate_limiting_buffer::bw_o {"bw_o"}

Definition at line 33 of file ordered_target.h.

◆ clk_i

sc_core::sc_in<bool> axi::pe::rate_limiting_buffer::clk_i {"clk_i"}

Definition at line 29 of file ordered_target.h.

◆ clk_if

sc_core::sc_clock* axi::pe::rate_limiting_buffer::clk_if {nullptr}
protected

Definition at line 76 of file ordered_target.h.

◆ fw_i

sc_core::sc_export<tlm::scc::pe::intor_fw_nb> axi::pe::rate_limiting_buffer::fw_i {"fw_i"}

Definition at line 31 of file ordered_target.h.

◆ rd_bw_limit_byte_per_sec

cci::cci_param<double> axi::pe::rate_limiting_buffer::rd_bw_limit_byte_per_sec {"rd_bw_limit_byte_per_sec", -1.0}

the bandwidth limit for read accesses. A value of -1 disables the limiting

Definition at line 48 of file ordered_target.h.

◆ rd_req2resp_fifo

scc::fifo_w_cb<std::tuple<tlm::tlm_generic_payload*, unsigned> > axi::pe::rate_limiting_buffer::rd_req2resp_fifo {"rd_req2resp_fifo"}
protected

queues realizing the min latency

Definition at line 79 of file ordered_target.h.

◆ rd_resp_delay

cci::cci_param<int>& axi::pe::rate_limiting_buffer::rd_resp_delay

the latency between request and response phase. Will be overwritten by the return of the callback function (if registered) -> RIV

Definition at line 39 of file ordered_target.h.

◆ rd_resp_fifo

scc::fifo_w_cb<tlm::tlm_generic_payload*> axi::pe::rate_limiting_buffer::rd_resp_fifo {"rd_resp_fifo"}
protected

queues to handle bandwidth limit

Definition at line 82 of file ordered_target.h.

◆ time_per_byte_rd

sc_core::sc_time axi::pe::rate_limiting_buffer::time_per_byte_rd
protected

Definition at line 77 of file ordered_target.h.

◆ time_per_byte_total

sc_core::sc_time axi::pe::rate_limiting_buffer::time_per_byte_total
protected

Definition at line 77 of file ordered_target.h.

◆ time_per_byte_wr

sc_core::sc_time axi::pe::rate_limiting_buffer::time_per_byte_wr
protected

Definition at line 77 of file ordered_target.h.

◆ total_arb

scc::ordered_semaphore axi::pe::rate_limiting_buffer::total_arb {1}
protected

Definition at line 84 of file ordered_target.h.

◆ total_bw_limit_byte_per_sec

cci::cci_param<double> axi::pe::rate_limiting_buffer::total_bw_limit_byte_per_sec {"total_bw_limit_byte_per_sec", -1.0}

the bandwidth limit for read accesses. A value of -1 disables the limiting

Definition at line 56 of file ordered_target.h.

◆ total_residual_clocks

double axi::pe::rate_limiting_buffer::total_residual_clocks {0.0}
protected

Definition at line 85 of file ordered_target.h.

◆ wr_bw_limit_byte_per_sec

cci::cci_param<double> axi::pe::rate_limiting_buffer::wr_bw_limit_byte_per_sec {"wr_bw_limit_byte_per_sec", -1.0}

the bandwidth limit for write accesses. A value of -1 disables the limiting

Definition at line 52 of file ordered_target.h.

◆ wr_req2resp_fifo

scc::fifo_w_cb<std::tuple<tlm::tlm_generic_payload*, unsigned> > axi::pe::rate_limiting_buffer::wr_req2resp_fifo {"wr_req2resp_fifo"}
protected

Definition at line 80 of file ordered_target.h.

◆ wr_resp_delay

cci::cci_param<int>& axi::pe::rate_limiting_buffer::wr_resp_delay

the latency between request and response phase. Will be overwritten by the return of the callback function (if registered) -> BV

Definition at line 44 of file ordered_target.h.

◆ wr_resp_fifo

scc::fifo_w_cb<tlm::tlm_generic_payload*> axi::pe::rate_limiting_buffer::wr_resp_fifo {"wr_resp_fifo"}
protected

Definition at line 83 of file ordered_target.h.


The documentation for this class was generated from the following files:
  • /home/eyck/Projects/MINRES/SystemC-Components/third_party/axi_chi/axi/pe/ordered_target.h
  • /home/eyck/Projects/MINRES/SystemC-Components/third_party/axi_chi/axi/pe/ordered_target.cpp