| ►Nahb | TLM2.0 components modeling AHB |
| ►Npe | Protocol engine implementations |
| ►Cahb_initiator_b | |
| Ctx_state | |
| Cahb3_initiator | |
| Cahb_target_b | |
| Cahb3_target | |
| ►Npin | Pin level adapters |
| Cinitiator | |
| Ctarget | |
| Cenable_for_enum | |
| Cahb_extension | |
| Cenable_for_enum< lock_e > | |
| Cenable_for_enum< resp_e > | |
| Cenable_for_enum< trans_e > | |
| Cenable_for_enum< burst_e > | |
| ►Napb | TLM2.0 components modeling APB |
| ►Npe | Protocol engine implementations |
| Capb_initiator_b | |
| Capb_initiator | |
| Capb_target_b | |
| Capb_target | |
| ►Npin | Pin level adapters |
| Cinitiator | |
| Ctarget | |
| Capb_extension | |
| ►Naxi | TLM2.0 components modeling AHB |
| ►Nchecker | |
| Cace_protocol | |
| Caxi_protocol | |
| Cchecker_if | |
| ►Nfsm | |
| Cbase | Base class of all AXITLM based adapters and interfaces |
| CWReq | |
| CBegPartReq | |
| CEndPartReq | |
| CBegReq | |
| CEndReq | |
| CBegPartResp | |
| CEndPartResp | |
| CBegResp | |
| CEndResp | |
| CEndRespNoAck | |
| CAckRecv | |
| CAxiProtocolFsm | |
| CIdle | Idle state |
| CATrans | Special state to map AWREADY/WDATA of SNPS to AXI protocol |
| CPartialRequest | Burst beat |
| CWriteIdle | Phase between 2 burst beats, should keep the link locked |
| CRequest | Request, either the last beat of a write or the address phase of a read |
| CWaitForResponse | Operation state where the target can do it's stuff |
| CPartialResponse | Beat of a burst response |
| CReadIdle | Phase between 2 read burst response beats |
| CResponse | Write response or the last read response (beat) |
| CWaitAck | Waiting for ack in case of ACE access |
| Cfsm_handle | |
| ►Nlwtr | |
| Cnb_ace_rec_entry | |
| Cace_lwtr | The TLM2 transaction recorder |
| Cace_lwtr_recorder | |
| Ctlm_id_ext_recording | |
| Caxi3_ext_recording | |
| Caxi4_ext_recording | |
| Cace_ext_recording | |
| Caxi_lwtr | The TLM2 transaction recorder |
| Caxi_lwtr_recorder | |
| ►Npe | Protocol engine implementations |
| ►Cace_target_pe | |
| Cbw_intor_impl | |
| ►Caxi_initiator_b | |
| Ctx_state | |
| Caxi_initiator | |
| Cace_lite_initiator | |
| Cace_initiator | |
| ►Caxi_target_pe | |
| Cbw_intor_impl | |
| Crate_limiting_buffer | |
| Cordered_target | |
| ►Ctx_reorderer | |
| Cque_entry | |
| Creordering_target | |
| Creplay_buffer | |
| Creplay_target | |
| Csimple_ace_target | |
| Csimple_initiator_b | |
| Csimple_axi_initiator | |
| Csimple_ace_initiator | |
| Csimple_target | |
| Ctarget_info_if | |
| ►Npin | Pin level adapters |
| Cace_initiator | |
| Cace_lite_initiator | |
| Cace_lite_target | |
| Cace_target | |
| Caxi4_initiator | |
| Caxi4_target | |
| ►Nscv | |
| ►Nimpl | |
| Cace_recording_payload | Class to hold the information to be recorded on the timed streams |
| Cace_recording_types | |
| Cace_rec_initiator_socket | |
| Cace_recorder | The TLM2 transaction recorder |
| Ctlm_id_ext_recording | |
| Caxi3_ext_recording | |
| Caxi4_ext_recording | |
| Cace_ext_recording | |
| Caxi_rec_initiator_socket | |
| Caxi_rec_target_socket | |
| Caxi_recorder | The TLM2 transaction recorder |
| Caxitlm_recorder_module | The TLM2 transaction recorder |
| Caxi_initiator_base | Axi_initiator class provides an input_socket for incoming TLM transactions. It attaches AXI extension to the tlm_generic_payload and forwards it to the AXI Protocol Engine |
| Caxi_initiator | |
| Caxi_target_base | Axi_target class instantiates the AXI Protocol Engine. It accesses the Protocol Engine with access() callback function and forwards the transactions via the output_socket |
| Caxi_target | |
| Cmaster_types | |
| Clite_master_types | |
| Cslave_types | |
| Clite_slave_types | |
| Csignal_types | |
| Cselect_if | |
| Cselect_if< true, T, S > | |
| Caxi4_cfg | |
| Caxi4_lite_cfg | |
| Cace_cfg | |
| Caw_axi_lite | Write address channel signals |
| Caw_axi | |
| Cwdata_axi_lite | Write data channel signals |
| Cwdata_axi | |
| Cb_axi_lite | Write response channel signals |
| Cb_axi | |
| Car_axi_lite | Read address channel signals |
| Car_axi | |
| Crresp_axi_lite | Read data channel signals |
| Crresp_axi | |
| Crresp_ace | |
| Car_ace | |
| Caw_ace | |
| Cac_ace | Snoop address(AC) channel signals |
| Ccd_ace | Snoop data(cd) channel signals |
| Ccr_ace | Snoop response(cr) channel signals |
| Cenable_for_enum | |
| Ccommon | |
| Crequest | |
| Caxi3 | |
| Caxi4 | |
| Cace | |
| Cresponse | |
| Cace_response | |
| Caxi_extension | |
| Caxi3_extension | |
| Caxi4_extension | |
| Cace_extension | |
| Caxi_protocol_types | The AXI protocol traits class. Since the protocoll defines additional non-ignorable phases a dedicated protocol traits class has to be defined |
| Cbw_blocking_transport_if | |
| Cace_bw_transport_if | |
| Caxi_initiator_socket | |
| Caxi_target_socket | |
| Cace_initiator_socket | |
| Cace_target_socket | |
| Cenable_for_enum< burst_e > | |
| Cenable_for_enum< lock_e > | |
| Cenable_for_enum< domain_e > | |
| Cenable_for_enum< bar_e > | |
| Cenable_for_enum< snoop_e > | |
| Cenable_for_enum< resp_e > | |
| ►Nchi | TLM2.0 components modeling CHI |
| ►Nlwtr | |
| Ctlm_id_ext_recording | |
| Cchi_ctrl_ext_recording | |
| Cchi_data_ext_recording | |
| Cchi_snp_ext_recording | |
| Cchi_link_ext_recording | |
| Cnb_chi_rec_entry | |
| Cchi_lwtr | The TLM2 transaction recorder |
| Cchi_lwtr_recorder | |
| ►Npe | |
| ►Cchi_rn_initiator_b | |
| Ctx_state | |
| Cchi_rn_initiator | |
| ►Nscv | |
| ►Nimpl | |
| Cchi_recording_payload | Class to hold the information to be recorded on the timed streams |
| Cchi_recording_types | |
| Cchi_trx_recorder | The TLM2 transaction recorder |
| Cchitlm_recorder_module | The TLM2 transaction recorder |
| Ctlm_id_ext_recording | |
| Cchi_ctrl_ext_recording | |
| Cchi_data_ext_recording | |
| Cchi_snp_ext_recording | |
| Cchi_credit_ext_recording | |
| Cenable_for_enum | |
| Ccommon | |
| Crequest | |
| Csnp_request | |
| Cdata | |
| Cresponse | |
| Ccredit | |
| Cchi_ctrl_extension | |
| Cchi_snp_extension | |
| Cchi_data_extension | |
| Cchi_credit_extension | |
| Cchi_protocol_types | The AXI protocol traits class. Since the protocoll defines additional non-ignorable phases a dedicated protocol traits class has to be defined |
| Cbw_blocking_transport_if | |
| Cchi_bw_transport_if | |
| Cchi_initiator_socket | |
| Cchi_target_socket | |
| Cenable_for_enum< req_optype_e > | |
| Cenable_for_enum< snp_optype_e > | |
| Cenable_for_enum< dat_optype_e > | |
| Cenable_for_enum< dat_resptype_e > | |
| Cenable_for_enum< rsp_optype_e > | |
| Cenable_for_enum< rsp_resptype_e > | |
| Cenable_for_enum< rsp_resperrtype_e > | |
| ►Ncxs | CXS TLM utilities |
| Ccxs_flit_payload | |
| Ccxs_flit_types | |
| Ccxs_packet_payload | |
| Ccxs_packet_types | |
| Corig_pkt_extension | |
| Ccxs_transmitter | |
| Ccxs_receiver | |
| Ccxs_channel | |
| ►Nlogging | SCC C++ logging |
| CLog | |
| COutput2FILE | |
| CDEFAULT | Default logging category |
| ►Nlwtr | |
| Cvalue_converter< tlm::tlm_phase > | |
| Cvalue_converter< tlm::tlm_sync_enum > | |
| Cvalue_converter< tlm::tlm_command > | |
| Cvalue_converter< tlm::tlm_response_status > | |
| Cvalue_converter< tlm::tlm_gp_option > | |
| Cvalue_converter< tlm::tlm_dmi::dmi_access_e > | |
| ►Nnonstd | |
| ►Ndetail | |
| Cin_place_type_tag | |
| Cin_place_index_tag | |
| ►Nvariants | |
| ►Ndetail | |
| Cindex_tag_t | |
| CTX | |
| CS0 | |
| CS1 | |
| CS2 | |
| CS3 | |
| CS4 | |
| CS5 | |
| CS6 | |
| CS7 | |
| CS8 | |
| CS9 | |
| CS10 | |
| CS11 | |
| CS12 | |
| CS13 | |
| CS14 | |
| CS15 | |
| Cnulltype | |
| Ctypelist | |
| Ctypelist_max | |
| Ctypelist_max< nulltype > | |
| Ctypelist_max< typelist< Head, Tail > > | |
| Ctypelist_size | |
| Ctypelist_size< T0 > | |
| Ctypelist_size< T1 > | |
| Ctypelist_size< T2 > | |
| Ctypelist_size< T3 > | |
| Ctypelist_size< T4 > | |
| Ctypelist_size< T5 > | |
| Ctypelist_size< T6 > | |
| Ctypelist_size< T7 > | |
| Ctypelist_size< T8 > | |
| Ctypelist_size< T9 > | |
| Ctypelist_size< T10 > | |
| Ctypelist_size< T11 > | |
| Ctypelist_size< T12 > | |
| Ctypelist_size< T13 > | |
| Ctypelist_size< T14 > | |
| Ctypelist_size< T15 > | |
| Ctypelist_size< nulltype > | |
| Ctypelist_size< typelist< Head, Tail > > | |
| Ctypelist_index_of | |
| Ctypelist_index_of< nulltype, T > | |
| Ctypelist_index_of< typelist< T, Tail >, T > | |
| Ctypelist_index_of< typelist< Head, Tail >, T > | |
| Ctypelist_type_at | |
| Ctypelist_type_at< typelist< Head, Tail >, 0 > | |
| Ctypelist_type_at< typelist< Head, Tail >, i > | |
| Ctypelist_type_is_unique | |
| Ctypelist_type_is_unique< List, CmpIndex, 0 > | |
| Ctypelist_contains_unique_type | |
| Calignment_of | |
| Calignment_of_hack | |
| Calignment_logic | |
| Ctype_of_size | |
| Ctype_of_size< nulltype, N > | |
| Cstruct_t | |
| Chelper | |
| CVisitorApplicatorImpl | |
| CVisitorApplicatorImpl< R, TX< VT > > | |
| CVisitorApplicator | |
| CVisitorUnwrapper | |
| CTypedVisitorUnwrapper | |
| CTypedVisitorUnwrapper< 2, R, Visitor, T2 > | |
| CTypedVisitorUnwrapper< 3, R, Visitor, T2, T3 > | |
| CTypedVisitorUnwrapper< 4, R, Visitor, T2, T3, T4 > | |
| CTypedVisitorUnwrapper< 5, R, Visitor, T2, T3, T4, T5 > | |
| CComparator | |
| ►Nstd11 | |
| Cremove_reference | |
| Cremove_reference< T & > | |
| Cadd_pointer | |
| Cremove_const | |
| Cremove_const< const T > | |
| Cremove_volatile | |
| Cremove_volatile< volatile T > | |
| Cremove_cv | |
| Cconditional | |
| Cconditional< true, Then, Else > | |
| Cconditional< false, Then, Else > | |
| Cenable_if | |
| Cenable_if< true, T > | |
| Cis_same | |
| Cis_same< T, T > | |
| Cvariant | |
| Cmonostate | |
| Cvariant_size | |
| Cvariant_size< variant< T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, T12, T13, T14, T15 > > | |
| Cvariant_alternative | |
| Cvariant_alternative< K, variant< T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, T12, T13, T14, T15 > > | |
| Cin_place_t | |
| ►Nobi | TLM2.0 components modeling OBI |
| ►Npin | |
| Ctarget | |
| Cobi_extension | |
| ►Nocp | TLM2.0 components modeling OCP |
| ►Npin | Pin level adapters |
| Ctarget | |
| Cocp_extension | |
| ►Nscc | SCC TLM utilities |
| ►Ndt | |
| Csc_logic_7 | |
| ►Nimpl | |
| Chelper | |
| Chelper< T, true > | |
| Chelper< T, false > | |
| Csc_register | Simple register implementation |
| ►Ntrace | SCC SystemC tracing utilities |
| Cfst_trace | |
| Cfst_trace_enum | |
| Cfst_trace_t | |
| Cgz_writer | |
| Ctraits | |
| Cvcd_scope_stack | |
| Cvcd_trace | |
| Cticking_clock | |
| Ctickless_clock | |
| Cmemory | Simple TLM2.0 LT memory model |
| Csc_register_indexed | |
| Csc_register_masked | |
| Cresetable | Base class for components having a reset |
| Cresource_access_if | Interface defining access to a resource e.g. a register |
| Cindexed_resource_access_if | Interface defining access to an indexed resource e.g. register file |
| ►Crouter | TLM2.0 router for loosly-timed (LT) models |
| Crange_entry | |
| Csocket_width_adapter | |
| Caddr_range | Struct representing address range |
| Ctlm_target | Simple access-width based bus interface (no DMI support) |
| Ctarget_memory_map_entry | |
| Ctarget_name_map_entry | |
| Ctlm_target_mod | |
| Ctlm_target_bfs_params | |
| Ctlm_target_bfs_base | |
| ►Ctlm_target_bfs | Peripheral base class using scc::tlm_target |
| Csocket_accessor | |
| Cabstract_bitfield | Abstract baseclass for bitfield |
| Cbitfield_register | Register that can contain bitfields |
| Cbitfield | |
| Ctlm_target_bfs_register_base | |
| Ccci_broker | |
| Ccci_param_restricted | Extension of cci_param<T, TM> which automatically registeres a callback to restrict the valid values given to the parameter |
| Cconfigurable_tracer | Configurable tracer for automatic port and signal tracing |
| ►Cconfigurer | Design configuration reader |
| CConfigHolder | |
| Cext_attribute | Extended sc_attribute |
| Cfifo_w_cb | Fifo with callbacks |
| Cfst_trace_file | |
| Chierarchy_dumper | |
| CMT19937 | Mersenne-twister based random number generator |
| ►Cobserver | The interface defining an observer |
| Cnotification_handle | A handle to be used be the observed object to notify the observer about a change |
| ►Cordered_semaphore | The ordered_semaphore primitive channel class |
| Clock | Lock for the semaphore |
| Cordered_semaphore_t | |
| Cpeq | Priority event queue |
| Cperf_estimator | Performance estimator |
| CLogConfig | Configuration class for the logging setup |
| CScLogger | Logger class |
| Cstream_redirection | Stream redirector |
| Csc_attribute_randomized | |
| Csc_clock_ext | A clock source with construction time configurable start delay |
| Csc_owning_signal | Sc_signal which takes ownership of the data (acquire()/release()) |
| Csc_thread_pool | |
| Csc_variable_b | |
| ►Csc_variable | SystemC variable |
| Ccreator | |
| ►Csc_variable< bool > | |
| Ccreator | |
| Csc_variable_vector | |
| Csc_ref_variable | Sc_ref_variable for a particular plain data type. This marks an existing C++ variable as discoverable via the sc_object tree. Whenever possible sc_variable should be used as this does not support value change callback |
| Csc_ref_variable< sc_core::sc_event > | |
| Csc_ref_variable_masked | Sc_variable for a particular plain data type with limited bit width |
| Csc_in_opt | |
| Csc_in_opt< bool > | |
| Csc_in_opt< sc_dt::sc_logic > | |
| Csc_inout_opt | |
| Csc_inout_opt< bool > | |
| Csc_inout_opt< sc_dt::sc_logic > | |
| Csc_out_opt | |
| Ctick2time | |
| Ctime2tick | Translate a tick-less clock (sc_time based) to boolean clock |
| Ctraceable | Interface defining a traceable component |
| Ctracer | Component traversing the SystemC object hierarchy and tracing the objects |
| CForLoop | |
| CForLoop< 1 > | |
| Csc_uint_tester | |
| Csc_int_tester | |
| Csc_biguint_tester | |
| Csc_bigint_tester | |
| Csc_bv_tester | |
| Csc_lv_tester | |
| Ctracer_base | Base class for automatic tracer |
| Cvcd_mt_trace_file | |
| Cvcd_pull_trace_file | |
| Cvcd_push_trace_file | |
| ►Nscp | |
| ►Ntlm_extensions | |
| Cinitiator_id | |
| Cpath_trace | |
| ►Nscv_tr | SystemC Verification Library (SCV) Transaction Recording |
| CAttrDesc | |
| ►CSQLiteDB | |
| CSQLiteException | |
| Cscv_extensions< tlm::tlm_command > | |
| Cscv_extensions< tlm::tlm_response_status > | |
| Cscv_extensions< tlm::tlm_gp_option > | |
| Cscv_extensions< tlm::scc::scv::tlm_phase_enum > | |
| Cscv_extensions< tlm::tlm_sync_enum > | |
| Cscv_extensions< tlm::scc::scv::tlm_gp_data > | |
| Cscv_extensions< tlm::tlm_dmi::dmi_access_e > | |
| Cscv_extensions< tlm::scc::scv::tlm_dmi_data > | |
| ►Nspi | SPI TLM utilities |
| Cspi_packet_payload | |
| Cspi_packet_types | |
| Cspi_channel | |
| ►Nstd | |
| Ctuple_size< TCB_SPAN_NAMESPACE_NAME::span< ElementType, Extent > > | |
| Ctuple_element< I, TCB_SPAN_NAMESPACE_NAME::span< ElementType, Extent > > | |
| Chash< util::delegate< R(A...)> > | |
| ►Nsysc | |
| Ctl_uh_bfm | |
| ►NTCB_SPAN_NAMESPACE_NAME | |
| ►Ndetail | |
| Cspan_storage | |
| Cspan_storage< E, dynamic_extent > | |
| Cis_span | |
| Cis_span< span< T, S > > | |
| Cis_std_array | |
| Cis_std_array< std::array< T, N > > | |
| Chas_size_and_data | |
| Chas_size_and_data< T, void_t< decltype(detail::size(std::declval< T >())), decltype(detail::data(std::declval< T >()))> > | |
| Cis_container | |
| Cis_container_element_type_compatible | |
| Cis_container_element_type_compatible< T, E, typename std::enable_if<!std::is_same< typename std::remove_cv< decltype(detail::data(std::declval< T >()))>::type, void >::value &&std::is_convertible< remove_pointer_t< decltype(detail::data(std::declval< T >()))>(*)[], E(*)[]>::value >::type > | |
| Cis_complete | |
| Cis_complete< T, decltype(sizeof(T))> | |
| Cspan | |
| ►Ntilelink | TLM2.0 components modeling APB |
| Cmaster_types | |
| Cslave_types | |
| Csignal_types | |
| Cselect_if | |
| Cselect_if< true, T, S > | |
| Ctl_cfg | |
| Cch_a | A channel signals |
| Cch_b | B channel signals |
| Cch_c | C channel signals |
| Cch_d | D channel signals |
| Cch_e | E channel signals |
| Ctl_ul | |
| Ctl_c | |
| Cenable_for_enum | |
| Ctilelink_extension | |
| Ctl_protocol_types | The AXI protocol traits class. Since the protocoll defines additional non-ignorable phases a dedicated protocol traits class has to be defined |
| Cbw_blocking_transport_if | |
| Ctlc_bw_transport_if | |
| Ctlu_initiator_socket | |
| Ctlu_target_socket | |
| Ctlc_initiator_socket | |
| Ctlc_target_socket | |
| Cenable_for_enum< opcode_e > | |
| ►Ntlm | SystemC TLM |
| ►Nnw | SCC TLM utilities |
| Cinitiator_mixin | Initiator socket mixin |
| Ctarget_mixin | |
| Ctlm_base_mm_interface | |
| Ctlm_network_payload_base | |
| ►Ctlm_network_payload | |
| Cgp_mm | |
| Ctlm_network_gp | |
| Ctlm_network_baseprotocol_types | |
| Ctlm_network_fw_transport_if | |
| Ctlm_network_bw_transport_if | |
| Ctlm_network_initiator_socket | |
| Ctlm_network_target_socket | |
| ►Nscc | SCC TLM utilities |
| ►Nlwtr | SCC SCV4TLM classes and functions |
| Clwtr4tlm2_extension_registry_if | The TLM transaction extensions recorder interface |
| Clwtr4tlm2_extension_registry | The TLM transaction extensions recorder registry |
| Ctlm_id_ext_recording | |
| Clink_pred_ext | |
| Cnb_rec_entry | |
| Ctlm2_lwtr | The TLM2 transaction recorder |
| Ctlm2_lwtr_recorder | |
| ►Npe | SCC protocol engines |
| Cintor_fw | |
| Cintor_bw | |
| Cintor_fw_b | |
| Cintor_fw_nb | |
| Cintor_bw_b | |
| Cintor_bw_nb | |
| Cparallel_pe | |
| ►Nscv | SCC SCV4TLM classes and functions |
| ►Nimpl | |
| Ctlm_recording_payload | |
| Ctlm_recording_types | |
| Ctlm_extensions_recording_if | The TLM transaction extensions recorder interface |
| Ctlm_extension_recording_registry | The TLM transaction extensions recorder registry |
| Ctlm_gp_data | |
| Ctlm_dmi_data | |
| Ctlm_rec_initiator_socket | |
| Ctlm_rec_target_socket | |
| Ctlm_id_ext_recording | |
| Ctlm_recorder | The TLM2 transaction recorder |
| Ctlm_recorder_module | The TLM2 transaction recorder |
| Ctlm_recording_extension | Generic payload extension class holding the handle of the last recorded SCV transaction |
| Ctlm_mm_traits< cxs::cxs_flit_types > | |
| Ctlm_mm_traits< cxs::cxs_packet_types > | |
| Ctlm_mm_traits< spi::spi_packet_types > | |
| Cinitiator_mixin | Initiator socket mixin |
| Csignal_initiator_mixin | |
| Csignal_target_mixin | |
| Ctagged_initiator_mixin | |
| Ctagged_target_mixin | |
| Ctarget_mixin | |
| Ctlm2_pv_av_target_adapter | |
| Ctlm2_pv_av_initiator_adapter | |
| Ctlm_unmanaged_extension | |
| ►Ctlm_managed_extension | |
| Cpool | |
| Cdata_buffer | |
| Ctlm_payload_shared_ptr | |
| Ctlm_id_extension | |
| Ctlm_gp_mm | |
| Ctlm_gp_mm_t | |
| Ctlm_gp_mm_v | |
| Ctlm_ext_mm | |
| Ctlm_mm_traits | |
| Ctlm_mm_t | |
| Ctlm_mm_t< TYPES, CLEANUP_DATA, tlm::tlm_mm_interface > | |
| Ctlm_mm | Tlm memory manager |
| Ctlm_signal | |
| Ctlm_signal2sc_signal | |
| Csc_signal2tlm_signal | |
| Ctlm_base_mm_interface | |
| Ctlm_generic_payload_base | |
| ►Ctlm_signal_gp | |
| Cgp_mm | |
| Ctlm_signal_baseprotocol_types | |
| Ctlm_signal_fw_transport_if | |
| Ctlm_signal_bw_transport_if | |
| Ctlm_signal_initiator_socket | |
| Ctlm_signal_target_socket | |
| ►Nutil | SCC common utilities |
| CBitFieldMember | Bit field element |
| ►CBitFieldArray | Array of bit field elements |
| CElement | |
| Cdelegate | |
| Cdelegate< R(A...)> | Fast alternative to std::function |
| CIoRedirector | Allows to capture the strings written to std::cout and std::cerr (MT-safe) |
| Clz4c_steambuf | |
| Clz4d_streambuf | |
| CMT19937 | Mersenne-Twister pseudo random number generator |
| Cpool_allocator | Generic pool allocator singleton not being MT-safe |
| ►Cstl_pool_allocator | |
| Crebind | |
| ►Crange_lut | Range based lookup table |
| Clut_entry | Lut entry |
| ►Cring_buffer | Circular buffer |
| Citerator_type | Iterator through the circular buffer |
| Csparse_array | Sparse array suitable for large sizes |
| Cthread_pool | Simple thread pool |
| Cthread_syncronizer | Executes a function syncronized in another thread |
| Cwatchdog | Watch dog based on https://github.com/didenko/TimeoutGuard |
| Cinitiator | Initiator ID recording TLM extension |
| CPath | Path recording TLM extension |
1.9.1