scc
2022.4.0
SystemC components library
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a TLM2.0 router for loosly-timed (LT) models More...
#include <router.h>
Classes | |
struct | range_entry |
Public Types | |
using | intor_sckt = tlm::scc::initiator_mixin< tlm::tlm_initiator_socket< BUSWIDTH > > |
using | target_sckt = tlm::scc::target_mixin< tlm::scc::scv::tlm_rec_target_socket< BUSWIDTH > > |
Public Member Functions | |
router (const sc_core::sc_module_name &nm, unsigned slave_cnt=1, unsigned master_cnt=1) | |
constructs a router More... | |
template<typename TYPE > | |
void | bind_target (TYPE &socket, size_t idx, uint64_t base, uint64_t size, bool remap=true) |
bind the initiator socket of the router to some target giving a base and size More... | |
template<typename TYPE > | |
void | bind_target (TYPE &socket, size_t idx, std::string name) |
bind the initiator socket of the router to some target and name it More... | |
void | set_initiator_base (size_t idx, uint64_t base) |
define a base address of a socket More... | |
void | set_default_target (size_t idx) |
define the default target socket More... | |
void | set_target_name (size_t idx, std::string name) |
establish a mapping between socket name and socket index More... | |
void | add_target_range (std::string name, uint64_t base, uint64_t size, bool remap=true) |
establish a mapping between a named socket and a target address range More... | |
void | set_target_range (size_t idx, uint64_t base, uint64_t size, bool remap=true) |
establish a mapping between a socket and a target address range More... | |
void | b_transport (int i, tlm::tlm_generic_payload &trans, sc_core::sc_time &delay) |
tagged blocking transport method More... | |
bool | get_direct_mem_ptr (int i, tlm::tlm_generic_payload &trans, tlm::tlm_dmi &dmi_data) |
tagged forward DMI method More... | |
unsigned | transport_dbg (int i, tlm::tlm_generic_payload &trans) |
tagged debug transaction method More... | |
void | invalidate_direct_mem_ptr (int id, ::sc_dt::uint64 start_range, ::sc_dt::uint64 end_range) |
tagged backward DMI method More... | |
Public Attributes | |
sc_core::sc_vector< target_sckt > | target |
the array of target sockets | |
sc_core::sc_vector< intor_sckt > | initiator |
the array of initiator sockets | |
Protected Attributes | |
size_t | default_idx = std::numeric_limits<size_t>::max() |
std::vector< uint64_t > | ibases |
std::vector< range_entry > | tranges |
std::vector< sc_core::sc_mutex > | mutexes |
util::range_lut< unsigned > | addr_decoder |
std::unordered_map< std::string, size_t > | target_name_lut |
a TLM2.0 router for loosly-timed (LT) models
It uses the tlm::scc::scv::tlm_rec_initiator_socket so that incoming and outgoing accesses can be traced using SCV
BUSWIDTH | the width of the bus |
scc::router< BUSWIDTH >::router | ( | const sc_core::sc_module_name & | nm, |
unsigned | slave_cnt = 1 , |
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unsigned | master_cnt = 1 |
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void scc::router< BUSWIDTH >::add_target_range | ( | std::string | name, |
uint64_t | base, | ||
uint64_t | size, | ||
bool | remap = true |
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) |
void scc::router< BUSWIDTH >::b_transport | ( | int | i, |
tlm::tlm_generic_payload & | trans, | ||
sc_core::sc_time & | delay | ||
) |
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inline |
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inline |
bind the initiator socket of the router to some target giving a base and size
TYPE | the socket type to bind |
socket | the target socket to bind |
idx | number of the target |
base | base address of the target |
size | size of the address range occupied by the target |
remap | if true address will be rewritten in accesses to be 0-based at the target |
bool scc::router< BUSWIDTH >::get_direct_mem_ptr | ( | int | i, |
tlm::tlm_generic_payload & | trans, | ||
tlm::tlm_dmi & | dmi_data | ||
) |
void scc::router< BUSWIDTH >::invalidate_direct_mem_ptr | ( | int | id, |
::sc_dt::uint64 | start_range, | ||
::sc_dt::uint64 | end_range | ||
) |
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inline |
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inline |
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inline |
void scc::router< BUSWIDTH >::set_target_range | ( | size_t | idx, |
uint64_t | base, | ||
uint64_t | size, | ||
bool | remap = true |
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) |
unsigned scc::router< BUSWIDTH >::transport_dbg | ( | int | i, |
tlm::tlm_generic_payload & | trans | ||
) |