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| SC_HAS_PROCESS (ace_lite_target) |
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| ace_lite_target (sc_core::sc_module_name const &nm) |
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| aw_ace (const char *prefix) |
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template<typename OTYPES > |
void | bind_aw (aw_ace< CFG, OTYPES > &o) |
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| wdata_axi (const char *prefix) |
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template<typename OTYPES > |
void | bind_w (wdata_axi< CFG, OTYPES > &o) |
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template<typename OTYPES > |
void | bind_wdata (wdata_axi< CFG, OTYPES > &o) |
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template<typename OTYPES > |
void | bind_w (wdata_axi_lite< CFG, OTYPES > &o) |
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template<typename OTYPES > |
void | bind_wdata (wdata_axi_lite< CFG, OTYPES > &o) |
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| b_axi (const char *prefix) |
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template<typename OTYPES > |
void | bind_b (b_axi< CFG, OTYPES > &o) |
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template<typename OTYPES > |
void | bind_b (b_axi_lite< CFG, OTYPES > &o) |
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| ar_ace (const char *prefix) |
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template<typename OTYPES > |
void | bind_ar (ar_ace< CFG, OTYPES > &o) |
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| rresp_axi (const char *prefix) |
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template<typename OTYPES > |
void | bind_r (rresp_axi< CFG, OTYPES > &o) |
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template<typename OTYPES > |
void | bind_rresp (rresp_axi< CFG, OTYPES > &o) |
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template<typename OTYPES > |
void | bind_r (rresp_axi_lite< CFG, OTYPES > &o) |
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template<typename OTYPES > |
void | bind_rresp (rresp_axi_lite< CFG, OTYPES > &o) |
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sc_core::sc_in< bool > | clk_i {"clk_i"} |
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axi::axi_initiator_socket< CFG::BUSWIDTH > | isckt {"isckt"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< CFG::IDWIDTH > > | aw_id {"aw_id"} |
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TYPES::template m2s_t< sc_dt::sc_uint< CFG::ADDRWIDTH > > | aw_addr {"aw_addr"} |
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TYPES::template s2m_t< bool > | aw_ready {"aw_ready"} |
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TYPES::template m2s_t< bool > | aw_lock {"aw_lock"} |
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TYPES::template m2s_t< bool > | aw_valid {"aw_valid"} |
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TYPES::template m2s_t< sc_dt::sc_uint< 3 > > | aw_prot {"aw_prot"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 3 > > | aw_size {"aw_size"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 4 > > | aw_cache {"aw_cache"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 2 > > | aw_burst {"aw_burst"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 4 > > | aw_qos {"aw_qos"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 4 > > | aw_region {"aw_region"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 8 > > | aw_len {"aw_len"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 2 > > | aw_domain {"aw_domain"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< CFG::AWSNOOPWIDTH > > | aw_snoop {"aw_snoop"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 2 > > | aw_bar {"aw_bar"} |
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TYPES::template m2s_t< bool > | aw_unique {"aw_unique"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< CFG::USERWIDTH > > | aw_user {"aw_user"} |
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TYPES::template m2s_t< bool > | aw_stashniden {"aw_stashniden"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 11 > > | aw_stashnid {"aw_stashnid"} |
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TYPES::template m2s_t< bool > | aw_stashlpiden {"aw_stashlpiden"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 5 > > | aw_stashlpid {"aw_stashlpid"} |
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TYPES::template m2s_opt_t< sc_dt::sc_uint< 6 > > | aw_atop {"aw_atop"} |
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TYPES::template m2s_opt_t< bool > | aw_trace {"aw_trace"} |
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TYPES::template m2s_opt_t< sc_dt::sc_uint< CFG::IDWIDTH > > | w_id {"w_id"} |
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TYPES::template m2s_t< typename CFG::data_t > | w_data {"w_data"} |
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TYPES::template m2s_t< sc_dt::sc_uint< CFG::BUSWIDTH/8 > > | w_strb {"w_strb"} |
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TYPES::template m2s_full_t< bool > | w_last {"w_last"} |
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TYPES::template m2s_t< bool > | w_valid {"w_valid"} |
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TYPES::template s2m_t< bool > | w_ready {"w_ready"} |
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TYPES::template m2s_opt_t< sc_dt::sc_uint< CFG::USERWIDTH > > | w_user {"w_user"} |
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TYPES::template m2s_full_t< bool > | w_ack {"w_ack"} |
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TYPES::template m2s_opt_t< bool > | w_trace {"w_trace"} |
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TYPES::template s2m_t< bool > | b_valid {"b_valid"} |
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TYPES::template m2s_t< bool > | b_ready {"b_ready"} |
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TYPES::template s2m_full_t< sc_dt::sc_uint< CFG::IDWIDTH > > | b_id {"b_id"} |
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TYPES::template s2m_t< sc_dt::sc_uint< 2 > > | b_resp {"b_resp"} |
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TYPES::template s2m_opt_t< sc_dt::sc_uint< CFG::USERWIDTH > > | b_user {"b_user"} |
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TYPES::template s2m_opt_t< bool > | b_trace {"b_trace"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< CFG::IDWIDTH > > | ar_id {"ar_id"} |
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TYPES::template m2s_t< sc_dt::sc_uint< CFG::ADDRWIDTH > > | ar_addr {"ar_addr"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 8 > > | ar_len {"ar_len"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 3 > > | ar_size {"ar_size"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 2 > > | ar_burst {"ar_burst"} |
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TYPES::template m2s_t< bool > | ar_lock {"ar_lock"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 4 > > | ar_cache {"ar_cache"} |
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TYPES::template m2s_t< sc_dt::sc_uint< 3 > > | ar_prot {"ar_prot"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 4 > > | ar_qos {"ar_qos"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 4 > > | ar_region {"ar_region"} |
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TYPES::template m2s_t< bool > | ar_valid {"ar_valid"} |
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TYPES::template s2m_t< bool > | ar_ready {"ar_ready"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 2 > > | ar_domain {"ar_domain"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 4 > > | ar_snoop {"ar_snoop"} |
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TYPES::template m2s_full_t< sc_dt::sc_uint< 2 > > | ar_bar {"ar_bar"} |
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TYPES::template m2s_opt_t< sc_dt::sc_uint< CFG::USERWIDTH > > | ar_user {"ar_user"} |
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TYPES::template m2s_opt_t< bool > | ar_trace {"ar_trace"} |
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TYPES::template m2s_opt_t< sc_dt::sc_uint< 4 > > | ar_vmidext {"ar_vmidext"} |
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TYPES::template s2m_full_t< sc_dt::sc_uint< CFG::IDWIDTH > > | r_id {"r_id"} |
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TYPES::template s2m_t< typename CFG::data_t > | r_data {"r_data"} |
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TYPES::template s2m_t< sc_dt::sc_uint< 2 > > | r_resp {"r_resp"} |
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TYPES::template s2m_full_t< bool > | r_last {"r_last"} |
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TYPES::template s2m_t< bool > | r_valid {"r_valid"} |
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TYPES::template m2s_t< bool > | r_ready {"r_ready"} |
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TYPES::template s2m_opt_t< sc_dt::sc_uint< CFG::USERWIDTH > > | r_user {"r_user"} |
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TYPES::template s2m_opt_t< bool > | r_trace {"r_trace"} |
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using | payload_type = axi::axi_protocol_types::tlm_payload_type |
| aliases used in the class
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using | phase_type = axi::axi_protocol_types::tlm_phase_type |
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| base (size_t transfer_width, bool coherent=false, axi::fsm::protocol_time_point_e wr_start=axi::fsm::RequestPhaseBeg) |
| the constructor More...
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virtual | ~base () |
| the destructor
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tlm::tlm_sync_enum | nb_fw (payload_type &trans, phase_type const &phase, sc_core::sc_time &t) |
| triggers the FSM based on TLM phases in the forward path. Should be called from np_transport_fw of the respective derived class More...
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tlm::tlm_sync_enum | nb_bw (payload_type &trans, phase_type const &phase, sc_core::sc_time &t) |
| triggers the FSM based on TLM phases in the backward path. Should be called from np_transport_bw of the respective derived class More...
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axi::fsm::fsm_handle * | find_or_create (payload_type *gp=nullptr, bool ace=false) |
| retrieve the FSM handle based on the transaction passed. If non exist one will be created More...
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void | process_fsm_event () |
| processes the fsm_event_queue and triggers FSM aligned
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void | process_fsm_clk_queue () |
| processes the fsm_clk_queue and triggers the FSM accordingly. Should be registered as rising-edge clock callback
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void | schedule (axi::fsm::protocol_time_point_e e, tlm::scc::tlm_gp_shared_ptr &gp, unsigned cycles) |
| processes the fsm_sched_queue and propagates events to fsm_clk_queue. Should be registered as falling-edge clock callback
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void | schedule (axi::fsm::protocol_time_point_e e, payload_type *gp, unsigned cycles) |
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void | schedule (axi::fsm::protocol_time_point_e e, tlm::scc::tlm_gp_shared_ptr &gp, sc_core::sc_time delay, bool syncronize=false) |
| processes the fsm_sched_queue and propagates events to fsm_clk_queue. Should be registered as falling-edge clock callback
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void | schedule (axi::fsm::protocol_time_point_e e, payload_type *gp, sc_core::sc_time delay, bool syncronize=false) |
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void | react (axi::fsm::protocol_time_point_e event, tlm::scc::tlm_gp_shared_ptr &trans) |
| triggers the FSM with event and given transaction More...
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void | react (axi::fsm::protocol_time_point_e event, payload_type *trans) |
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void | react (axi::fsm::protocol_time_point_e, axi::fsm::fsm_handle *) |
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::scc::peq< std::tuple< axi::fsm::protocol_time_point_e, payload_type *, bool > > | fsm_event_queue |
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::scc::fifo_w_cb< std::tuple< axi::fsm::protocol_time_point_e, payload_type *, unsigned > > | fsm_clk_queue |
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sc_core::sc_process_handle | fsm_clk_queue_hndl |
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size_t | transfer_width_in_bytes |
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const axi::fsm::protocol_time_point_e | wr_start |
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const bool | coherent |
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std::unordered_map< payload_type *, axi::fsm::fsm_handle * > | active_fsm |
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std::deque< axi::fsm::fsm_handle * > | idle_fsm |
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std::vector< std::unique_ptr< axi::fsm::fsm_handle > > | allocated_fsm |
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std::string | instance_name |
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sc_core::sc_event | finish_evt |
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template<typename CFG>
struct axi::pin::ace_lite_target< CFG >
Definition at line 36 of file ace_lite_target.h.