scc 2025.09
SystemC components library
tlm2_lwtr.h
1/*
2 * Copyright 2022-2023 MINRES Technologies GmbH
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#pragma once
18
19#include "lwtr4tlm2.h"
20#include <array>
21#include <cci_configuration>
22#include <regex>
23#include <scc/peq.h>
24#include <sstream>
25#include <string>
26#include <sysc/kernel/sc_dynamic_processes.h>
27#include <tlm/scc/lwtr/lwtr4tlm2_extension_registry.h>
28#include <tlm/scc/tlm_gp_shared.h>
29#include <tlm/scc/tlm_mm.h>
30#include <unordered_map>
31
37namespace tlm {
38namespace scc {
39namespace lwtr {
40
41using tx_db = ::lwtr::tx_db;
42using tx_fiber = ::lwtr::tx_fiber;
43template <typename BEGIN = ::lwtr::no_data, typename END = ::lwtr::no_data> using tx_generator = ::lwtr::tx_generator<BEGIN, END>;
44using tx_handle = ::lwtr::tx_handle;
45using mm = tlm::scc::tlm_mm<>;
46
47extern bool registered;
61
70struct link_pred_ext : public tlm::tlm_extension<link_pred_ext> {
78 tlm_extension_base* clone() const override {
79 link_pred_ext* t = new link_pred_ext(this->txHandle, this->creator);
80 return t;
81 }
82
85 void copy_from(tlm_extension_base const& from) override {
86 txHandle = static_cast<link_pred_ext const&>(from).txHandle;
87 creator = static_cast<link_pred_ext const&>(from).creator;
88 }
89
92 link_pred_ext(tx_handle handle, void const* creator_)
93 : txHandle(handle)
94 , creator(creator_) {}
95 tx_handle txHandle;
96 void const* creator;
97};
98
103 tlm::scc::tlm_gp_shared_ptr tr;
104 tlm::tlm_phase const ph;
105 uintptr_t const id;
106 tx_handle parent;
107};
108
117template <typename TYPES = tlm::tlm_base_protocol_types>
118class tlm2_lwtr : public virtual tlm::tlm_fw_transport_if<TYPES>, public virtual tlm::tlm_bw_transport_if<TYPES> {
119public:
121 cci::cci_param<bool> enableBlTracing;
122
124 cci::cci_param<bool> enableNbTracing;
125
127 cci::cci_param<bool> enableTimedTracing{"enableTimedTracing", true};
128
130 cci::cci_param<bool> enableDmiTracing{"enableDmiTracing", false};
131
142 tlm2_lwtr(bool recording_enabled = true, tx_db* tr_db = tx_db::get_default_db())
143 : tlm2_lwtr(sc_core::sc_gen_unique_name("tlm_recorder"), recording_enabled, tr_db) {}
155 tlm2_lwtr(const char* full_name, bool recording_enabled = true, tx_db* tr_db = tx_db::get_default_db())
156 : enableBlTracing("enableBlTracing", recording_enabled)
157 , enableNbTracing("enableNbTracing", recording_enabled)
158 , full_name(full_name)
159 , nb_timed_peq()
160 , m_db(tr_db) {
161 sc_core::sc_spawn_options opts;
162 opts.spawn_method();
163 opts.dont_initialize();
164 opts.set_sensitivity(&nb_timed_peq.event());
165 sc_core::sc_spawn([this]() { nbtx_cb(); }, nullptr, &opts);
166 initialize_streams();
167 }
168
169 virtual ~tlm2_lwtr() override {
170 nbtx_req_handle_map.clear();
171 nbtx_last_req_handle_map.clear();
172 delete b_streamHandle;
173 for(auto* p : b_trHandle)
174 delete p; // NOLINT
175 delete b_streamHandleTimed;
176 for(auto* p : b_trTimedHandle)
177 delete p; // NOLINT
178 delete nb_streamHandle;
179 for(auto* p : nb_trHandle)
180 delete p; // NOLINT
181 delete nb_streamHandleTimed;
182 for(auto* p : nb_trTimedHandle)
183 delete p; // NOLINT
184 delete dmi_streamHandle;
185 delete dmi_trGetHandle;
186 delete dmi_trInvalidateHandle;
187 }
188
189 // TLM-2.0 interface methods for initiator and target sockets, surrounded with
190 // Tx Recording
200 tlm::tlm_sync_enum nb_transport_fw(typename TYPES::tlm_payload_type& trans, typename TYPES::tlm_phase_type& phase,
201 sc_core::sc_time& delay) override;
202
212 tlm::tlm_sync_enum nb_transport_bw(typename TYPES::tlm_payload_type& trans, typename TYPES::tlm_phase_type& phase,
213 sc_core::sc_time& delay) override;
214
223 void b_transport(typename TYPES::tlm_payload_type& trans, sc_core::sc_time& delay) override;
231 bool get_direct_mem_ptr(typename TYPES::tlm_payload_type& trans, tlm::tlm_dmi& dmi_data) override;
238 void invalidate_direct_mem_ptr(sc_dt::uint64 start_addr, sc_dt::uint64 end_addr) override;
245 unsigned int transport_dbg(typename TYPES::tlm_payload_type& trans) override;
251 inline bool isRecordingBlockingTxEnabled() const { return m_db && enableBlTracing.get_value(); }
257 inline bool isRecordingNonBlockingTxEnabled() const { return m_db && enableNbTracing.get_value(); }
258
259protected:
261 sc_core::sc_port<tlm::tlm_fw_transport_if<TYPES>> fw_port{"fw_port"};
262
264 sc_core::sc_port<tlm::tlm_bw_transport_if<TYPES>> bw_port{"bw_port"};
265
266private:
267 std::string const full_name;
269 ::scc::peq<nb_rec_entry> nb_timed_peq;
274 void nbtx_cb();
276 tx_db* m_db{nullptr};
278 ::lwtr::tx_relation_handle pred_succ_hndl{0}, par_chld_hndl{0};
280 tx_fiber* b_streamHandle{nullptr};
282 std::array<tx_generator<sc_core::sc_time, sc_core::sc_time>*, 3> b_trHandle{{nullptr, nullptr, nullptr}};
284 tx_fiber* b_streamHandleTimed{nullptr};
287 std::array<tx_generator<>*, 3> b_trTimedHandle{{nullptr, nullptr, nullptr}};
288
289 enum DIR { FW, BW, REQ = FW, RESP = BW };
291 tx_fiber* nb_streamHandle{nullptr};
293 tx_fiber* nb_streamHandleTimed{nullptr};
295 std::array<tx_generator<std::string, std::string>*, 2> nb_trHandle{{nullptr, nullptr}};
297 std::array<tx_generator<>*, 2> nb_trTimedHandle{{nullptr, nullptr}};
298 std::unordered_map<uint64_t, tx_handle> nbtx_req_handle_map;
299 std::unordered_map<uint64_t, tx_handle> nbtx_last_req_handle_map;
300
302 tx_fiber* dmi_streamHandle{nullptr};
304 tx_generator<>* dmi_trGetHandle{nullptr};
305 tx_generator<sc_dt::uint64, sc_dt::uint64>* dmi_trInvalidateHandle{nullptr};
306
307protected:
308 void initialize_streams() {
309 if(m_db) {
310 pred_succ_hndl = m_db->create_relation("PREDECESSOR_SUCCESSOR");
311 par_chld_hndl = m_db->create_relation("PARENT_CHILD");
312 }
313 if(isRecordingBlockingTxEnabled() && !b_streamHandle) {
314 b_streamHandle = new tx_fiber((full_name + "_bl").c_str(), "[TLM][base-protocol][b]", m_db);
315 b_trHandle[tlm::TLM_READ_COMMAND] =
316 new tx_generator<sc_core::sc_time, sc_core::sc_time>("read", *b_streamHandle, "start_delay", "end_delay");
317 b_trHandle[tlm::TLM_WRITE_COMMAND] =
318 new tx_generator<sc_core::sc_time, sc_core::sc_time>("write", *b_streamHandle, "start_delay", "end_delay");
319 b_trHandle[tlm::TLM_IGNORE_COMMAND] =
320 new tx_generator<sc_core::sc_time, sc_core::sc_time>("ignore", *b_streamHandle, "start_delay", "end_delay");
321 if(enableTimedTracing.get_value()) {
322 b_streamHandleTimed = new tx_fiber((full_name + "_bl_timed").c_str(), "[TLM][base-protocol][b][timed]", m_db);
323 b_trTimedHandle[tlm::TLM_READ_COMMAND] = new tx_generator<>("read", *b_streamHandleTimed);
324 b_trTimedHandle[tlm::TLM_WRITE_COMMAND] = new tx_generator<>("write", *b_streamHandleTimed);
325 b_trTimedHandle[tlm::TLM_IGNORE_COMMAND] = new tx_generator<>("ignore", *b_streamHandleTimed);
326 }
327 }
328 if(isRecordingNonBlockingTxEnabled() && !nb_streamHandle) {
329 nb_streamHandle = new tx_fiber((full_name + "_nb").c_str(), "[TLM][base-protocol][nb]", m_db);
330 nb_trHandle[FW] = new tx_generator<std::string, std::string>("fw", *nb_streamHandle, "tlm_phase", "tlm_phase[return_path]");
331 nb_trHandle[BW] = new tx_generator<std::string, std::string>("bw", *nb_streamHandle, "tlm_phase", "tlm_phase[return_path]");
332 if(enableTimedTracing.get_value()) {
333 nb_streamHandleTimed = new tx_fiber((full_name + "_nb_timed").c_str(), "[TLM][base-protocol][nb][timed]", m_db);
334 nb_trTimedHandle[FW] = new tx_generator<>("request", *nb_streamHandleTimed);
335 nb_trTimedHandle[BW] = new tx_generator<>("response", *nb_streamHandleTimed);
336 }
337 }
338 if(m_db && enableDmiTracing.get_value() && !dmi_streamHandle) {
339 dmi_streamHandle = new tx_fiber((full_name + "_dmi").c_str(), "[TLM][base-protocol][dmi]", m_db);
340 dmi_trGetHandle = new tx_generator<>("get", *dmi_streamHandle);
341 dmi_trInvalidateHandle =
342 new tx_generator<sc_dt::uint64, sc_dt::uint64>("invalidate", *dmi_streamHandle, "start_addr", "end_addr");
343 }
344 }
345
346private:
347 inline std::string phase2string(const tlm::tlm_phase& p) {
348 std::stringstream ss;
349 ss << p;
350 return ss.str();
351 }
352};
353
354template <unsigned BUSWIDTH = 32, typename TYPES = tlm::tlm_base_protocol_types, int N = 1,
355 sc_core::sc_port_policy POL = sc_core::SC_ONE_OR_MORE_BOUND>
356class tlm2_lwtr_recorder : public sc_core::sc_module, public tlm2_lwtr<TYPES> {
357public:
358 tlm::tlm_target_socket<BUSWIDTH, TYPES, N, POL> ts{"ts"};
359 tlm::tlm_initiator_socket<BUSWIDTH, TYPES, N, POL> is{"is"};
360
361 tlm2_lwtr_recorder(sc_core::sc_module_name nm, bool recording_enabled = true, tx_db* tr_db = tx_db::get_default_db())
362 : sc_core::sc_module(nm)
363 , tlm2_lwtr<TYPES>(name(), recording_enabled, tr_db) {
364 is(*this);
365 ts(*this);
366 this->bw_port(ts.get_base_port());
367 this->fw_port(is.get_base_port());
368 }
369};
370
372// implementations of functions
374
375template <typename TYPES> void tlm2_lwtr<TYPES>::b_transport(typename TYPES::tlm_payload_type& trans, sc_core::sc_time& delay) {
377 fw_port->b_transport(trans, delay);
378 return;
379 }
380 // Get a handle for the new transaction
381 tx_handle h = b_trHandle[trans.get_command()]->begin_tx(delay);
382 tx_handle htim;
383 /*************************************************************************
384 * do the timed notification
385 *************************************************************************/
386 if(b_streamHandleTimed)
387 htim = b_trTimedHandle[trans.get_command()]->begin_tx_delayed(sc_core::sc_time_stamp() + delay, par_chld_hndl, h);
388
389 if(registered)
390 for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
391 if(extensionRecording) {
392 extensionRecording->recordBeginTx(h, trans);
393 if(htim.is_valid())
394 extensionRecording->recordBeginTx(htim, trans);
395 }
396 link_pred_ext* preExt = nullptr;
397
398 trans.get_extension(preExt);
399 if(preExt == nullptr) { // we are the first recording this transaction
400 preExt = new link_pred_ext(h, this);
401 if(trans.has_mm())
402 trans.set_auto_extension(preExt);
403 else
404 trans.set_extension(preExt);
405 } else {
406 h.add_relation(pred_succ_hndl, preExt->txHandle);
407 }
408 tx_handle preTx{preExt->txHandle};
409 preExt->txHandle = h;
410 fw_port->b_transport(trans, delay);
411 trans.get_extension(preExt);
412 if(preExt->creator == this) {
413 // clean-up the extension if this is the original creator
414 trans.set_extension(static_cast<link_pred_ext*>(nullptr));
415 if(!trans.has_mm()) {
416 delete preExt;
417 }
418 } else {
419 preExt->txHandle = preTx;
420 }
421 h.record_attribute("trans", trans);
422 if(registered)
423 for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
424 if(extensionRecording) {
425 extensionRecording->recordEndTx(h, trans);
426 if(htim.is_active())
427 extensionRecording->recordEndTx(htim, trans);
428 }
429 // End the transaction
430 h.end_tx(delay);
431 // and now the stuff for the timed tx
432 if(htim.is_valid()) {
433 htim.record_attribute("trans", trans);
434 htim.end_tx_delayed(sc_core::sc_time_stamp() + delay);
435 }
436}
437
438template <typename TYPES>
439tlm::tlm_sync_enum tlm2_lwtr<TYPES>::nb_transport_fw(typename TYPES::tlm_payload_type& trans, typename TYPES::tlm_phase_type& phase,
440 sc_core::sc_time& delay) {
442 return fw_port->nb_transport_fw(trans, phase, delay);
443 /*************************************************************************
444 * prepare recording
445 *************************************************************************/
446 // Get a handle for the new transaction
447 tx_handle h = nb_trHandle[FW]->begin_tx(phase2string(phase));
448 link_pred_ext* preExt = nullptr;
449 trans.get_extension(preExt);
450 if(preExt == nullptr) { // we are the first recording this transaction
451 preExt = new link_pred_ext(h, this);
452 if(trans.has_mm())
453 trans.set_auto_extension(preExt);
454 else
455 trans.set_extension(preExt);
456 } else {
457 // link handle if we have a predecessor
458 h.add_relation(pred_succ_hndl, preExt->txHandle);
459 }
460 // update the extension
461 preExt->txHandle = h;
462 h.record_attribute("delay", delay);
463 if(registered)
464 for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
465 if(extensionRecording)
466 extensionRecording->recordBeginTx(h, trans);
467 /*************************************************************************
468 * do the timed notification
469 *************************************************************************/
470 if(nb_streamHandleTimed) {
471 nb_rec_entry rec{mm::get().allocate(), phase, reinterpret_cast<uint64_t>(&trans), h};
472 rec.tr->deep_copy_from(trans);
473 nb_timed_peq.notify(rec, delay);
474 }
475 /*************************************************************************
476 * do the access
477 *************************************************************************/
478 tlm::tlm_sync_enum status = fw_port->nb_transport_fw(trans, phase, delay);
479 /*************************************************************************
480 * handle recording
481 *************************************************************************/
482 h.record_attribute("tlm_sync", status);
483 h.record_attribute("delay[return_path]", delay);
484 h.record_attribute("trans", trans);
485 if(registered)
486 for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
487 if(extensionRecording)
488 extensionRecording->recordEndTx(h, trans);
489 // get the extension and free the memory if it was mine
490 if(status == tlm::TLM_COMPLETED || (status == tlm::TLM_ACCEPTED && phase == tlm::END_RESP)) {
491 trans.get_extension(preExt);
492 if(preExt && preExt->creator == this) {
493 trans.set_extension(static_cast<link_pred_ext*>(nullptr));
494 if(!trans.has_mm()) {
495 delete preExt;
496 }
497 }
498 /*************************************************************************
499 * do the timed notification if req. finished here
500 *************************************************************************/
501 if(nb_streamHandleTimed) {
502 nb_rec_entry rec{mm::get().allocate(), phase, reinterpret_cast<uint64_t>(&trans), h};
503 rec.tr->deep_copy_from(trans);
504 nb_timed_peq.notify(rec, delay);
505 }
506 } else if(nb_streamHandleTimed && status == tlm::TLM_UPDATED) {
507 nb_rec_entry rec{mm::get().allocate(), phase, reinterpret_cast<uint64_t>(&trans), h};
508 rec.tr->deep_copy_from(trans);
509 nb_timed_peq.notify(rec, delay);
510 }
511 // End the transaction
512 nb_trHandle[FW]->end_tx(h, phase2string(phase));
513 return status;
514}
515
516template <typename TYPES>
517tlm::tlm_sync_enum tlm2_lwtr<TYPES>::nb_transport_bw(typename TYPES::tlm_payload_type& trans, typename TYPES::tlm_phase_type& phase,
518 sc_core::sc_time& delay) {
520 return bw_port->nb_transport_bw(trans, phase, delay);
521 /*************************************************************************
522 * prepare recording
523 *************************************************************************/
524 link_pred_ext* preExt = nullptr;
525 trans.get_extension(preExt);
526 // Get a handle for the new transaction
527 tx_handle h = nb_trHandle[BW]->begin_tx(phase2string(phase));
528 // link handle if we have a predecessor and that's not ourself
529 if(preExt) {
530 h.add_relation(pred_succ_hndl, preExt->txHandle);
531 // and set the extension handle to this transaction
532 preExt->txHandle = h;
533 }
534 // and set the extension handle to this transaction
535 h.record_attribute("delay", delay);
536 for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
537 if(extensionRecording)
538 extensionRecording->recordBeginTx(h, trans);
539 /*************************************************************************
540 * do the timed notification
541 *************************************************************************/
542 if(nb_streamHandleTimed) {
543 nb_rec_entry rec{mm::get().allocate(), phase, reinterpret_cast<uint64_t>(&trans), h};
544 rec.tr->deep_copy_from(trans);
545 nb_timed_peq.notify(rec, delay);
546 }
547 /*************************************************************************
548 * do the access
549 *************************************************************************/
550 tlm::tlm_sync_enum status = bw_port->nb_transport_bw(trans, phase, delay);
551 /*************************************************************************
552 * handle recording
553 *************************************************************************/
554 h.record_attribute("tlm_sync", status);
555 h.record_attribute("delay[return_path]", delay);
556 h.record_attribute("trans", trans);
557 if(registered)
558 for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
559 if(extensionRecording)
560 extensionRecording->recordEndTx(h, trans);
561 // End the transaction
562 nb_trHandle[BW]->end_tx(h, phase2string(phase));
563 // get the extension and free the memory if it was mine
564 if(status == tlm::TLM_COMPLETED || (status == tlm::TLM_UPDATED && phase == tlm::END_RESP)) {
565 // the transaction is finished
566 if(preExt && preExt->creator == this) {
567 // clean-up the extension if this is the original creator
568 trans.set_extension(static_cast<link_pred_ext*>(nullptr));
569 if(!trans.has_mm()) {
570 delete preExt;
571 }
572 }
573 /*************************************************************************
574 * do the timed notification if req. finished here
575 *************************************************************************/
576 if(nb_streamHandleTimed) {
577 nb_rec_entry rec{mm::get().allocate(), phase, reinterpret_cast<uint64_t>(&trans), h};
578 rec.tr->deep_copy_from(trans);
579 nb_timed_peq.notify(rec, delay);
580 }
581 }
582 return status;
583}
584
585template <typename TYPES> void tlm2_lwtr<TYPES>::nbtx_cb() {
586 auto opt = nb_timed_peq.get_next();
587 if(opt) {
588 auto& e = opt.get();
589 tx_handle h;
590 switch(e.ph) { // Now process outstanding recordings
591 case tlm::BEGIN_REQ:
592 h = nb_trTimedHandle[REQ]->begin_tx(par_chld_hndl, e.parent);
593 nbtx_req_handle_map[e.id] = h;
594 break;
595 case tlm::END_REQ: {
596 auto it = nbtx_req_handle_map.find(e.id);
597 sc_assert(it != nbtx_req_handle_map.end());
598 h = it->second;
599 nbtx_req_handle_map.erase(it);
600 h.record_attribute("trans", *e.tr);
601 h.end_tx();
602 nbtx_last_req_handle_map[e.id] = h;
603 } break;
604 case tlm::BEGIN_RESP: {
605 auto it = nbtx_req_handle_map.find(e.id);
606 if(it != nbtx_req_handle_map.end()) {
607 h = it->second;
608 nbtx_req_handle_map.erase(it);
609 h.record_attribute("trans", *e.tr);
610 h.end_tx();
611 nbtx_last_req_handle_map[e.id] = h;
612 }
613 h = nb_trTimedHandle[RESP]->begin_tx(par_chld_hndl, e.parent);
614 nbtx_req_handle_map[e.id] = h;
615 it = nbtx_last_req_handle_map.find(e.id);
616 if(it != nbtx_last_req_handle_map.end()) {
617 tx_handle pred = it->second;
618 nbtx_last_req_handle_map.erase(it);
619 h.add_relation(pred_succ_hndl, pred);
620 }
621 } break;
622 case tlm::END_RESP: {
623 auto it = nbtx_req_handle_map.find(e.id);
624 if(it != nbtx_req_handle_map.end()) {
625 h = it->second;
626 nbtx_req_handle_map.erase(it);
627 h.record_attribute("trans", *e.tr);
628 h.end_tx();
629 }
630 } break;
631 default:
632 // sc_assert(!"phase not supported!");
633 break;
634 }
635 }
636 return;
637}
638
639template <typename TYPES> bool tlm2_lwtr<TYPES>::get_direct_mem_ptr(typename TYPES::tlm_payload_type& trans, tlm::tlm_dmi& dmi_data) {
640 if(!(m_db && enableDmiTracing.get_value()))
641 return fw_port->get_direct_mem_ptr(trans, dmi_data);
642 tx_handle h = dmi_trGetHandle->begin_tx();
643 bool status = fw_port->get_direct_mem_ptr(trans, dmi_data);
644 h.record_attribute("trans", trans);
645 h.record_attribute("dmi_data", dmi_data);
646 h.end_tx();
647 return status;
648}
649
655template <typename TYPES> void tlm2_lwtr<TYPES>::invalidate_direct_mem_ptr(sc_dt::uint64 start_addr, sc_dt::uint64 end_addr) {
656 if(!(m_db && enableDmiTracing.get_value())) {
657 bw_port->invalidate_direct_mem_ptr(start_addr, end_addr);
658 return;
659 }
660 tx_handle h = dmi_trInvalidateHandle->begin_tx(start_addr);
661 bw_port->invalidate_direct_mem_ptr(start_addr, end_addr);
662 dmi_trInvalidateHandle->end_tx(h, end_addr);
663 return;
664}
665
671template <typename TYPES> unsigned int tlm2_lwtr<TYPES>::transport_dbg(typename TYPES::tlm_payload_type& trans) {
672 return fw_port->transport_dbg(trans);
673}
674} // namespace lwtr
675} // namespace scc
676} // namespace tlm
The TLM2 transaction recorder.
Definition tlm2_lwtr.h:118
cci::cci_param< bool > enableNbTracing
the attribute to selectively enable/disable recording of non-blocking protocol tx
Definition tlm2_lwtr.h:124
void b_transport(typename TYPES::tlm_payload_type &trans, sc_core::sc_time &delay) override
The blocking transport function.
Definition tlm2_lwtr.h:375
bool isRecordingBlockingTxEnabled() const
get the current state of transaction recording
Definition tlm2_lwtr.h:251
cci::cci_param< bool > enableDmiTracing
the attribute to selectively enable/disable DMI recording
Definition tlm2_lwtr.h:130
sc_core::sc_port< tlm::tlm_bw_transport_if< TYPES > > bw_port
the port where bw accesses are forwarded to
Definition tlm2_lwtr.h:264
void invalidate_direct_mem_ptr(sc_dt::uint64 start_addr, sc_dt::uint64 end_addr) override
The direct memory interface backward function.
Definition tlm2_lwtr.h:655
bool get_direct_mem_ptr(typename TYPES::tlm_payload_type &trans, tlm::tlm_dmi &dmi_data) override
The direct memory interface forward function.
Definition tlm2_lwtr.h:639
bool isRecordingNonBlockingTxEnabled() const
get the current state of transaction recording
Definition tlm2_lwtr.h:257
tlm::tlm_sync_enum nb_transport_fw(typename TYPES::tlm_payload_type &trans, typename TYPES::tlm_phase_type &phase, sc_core::sc_time &delay) override
The non-blocking forward transport function.
Definition tlm2_lwtr.h:439
unsigned int transport_dbg(typename TYPES::tlm_payload_type &trans) override
The debug transportfunction.
Definition tlm2_lwtr.h:671
cci::cci_param< bool > enableTimedTracing
the attribute to selectively enable/disable timed recording
Definition tlm2_lwtr.h:127
sc_core::sc_port< tlm::tlm_fw_transport_if< TYPES > > fw_port
the port where fw accesses are forwarded to
Definition tlm2_lwtr.h:261
tlm::tlm_sync_enum nb_transport_bw(typename TYPES::tlm_payload_type &trans, typename TYPES::tlm_phase_type &phase, sc_core::sc_time &delay) override
The non-blocking backward transport function.
Definition tlm2_lwtr.h:517
cci::cci_param< bool > enableBlTracing
the attribute to selectively enable/disable recording of blocking protocol tx
Definition tlm2_lwtr.h:121
payload_type * allocate()
get a plain tlm_payload_type without extensions
Definition tlm_mm.h:218
SCC SCV4TLM classes and functions.
@ PREDECESSOR_SUCCESSOR
Definition tlm2_lwtr.h:59
SCC TLM utilities.
Definition axis_tlm.h:56
SystemC TLM.
Definition dmi_mgr.h:19
priority event queue
Definition peq.h:41
boost::optional< TYPE > get_next()
non-blocking get
Definition peq.h:124
Definition tlm2_lwtr.h:102
static tlm_mm & get()
accessor function of the singleton
Definition tlm_mm.h:338