scc 2025.09
SystemC components library
ace_target_pe.h
1/*
2 * Copyright 2020-2022 Arteris IP
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.axi_util.cpp
15 */
16
17#pragma once
18
19#ifndef SC_INCLUDE_DYNAMIC_PROCESSES
20#define SC_INCLUDE_DYNAMIC_PROCESSES
21#endif
22
23#include <array>
24#include <axi/fsm/base.h>
25#include <functional>
26#include <memory>
27#include <scc/ordered_semaphore.h>
28#include <scc/sc_attribute_randomized.h>
29#include <scc/sc_variable.h>
30#include <tlm/scc/pe/intor_if.h>
31#include <tlm_utils/peq_with_cb_and_phase.h>
32#include <unordered_set>
33
35namespace axi {
37namespace pe {
41class ace_target_pe : public sc_core::sc_module,
42 protected axi::fsm::base,
43 public axi::axi_bw_transport_if<axi::axi_protocol_types>,
44 public axi::ace_fw_transport_if<axi::axi_protocol_types> {
45 struct bw_intor_impl;
46public:
47
48 using payload_type = axi::axi_protocol_types::tlm_payload_type;
49 using phase_type = axi::axi_protocol_types::tlm_phase_type;
50
51 sc_core::sc_in<bool> clk_i{"clk_i"};
52
53 // hongyu?? here first hardcoded
54 axi::axi_initiator_socket<64> isckt_axi{"isckt_axi"};
55
56 sc_core::sc_port<tlm::scc::pe::intor_fw_nb, 1, sc_core::SC_ZERO_OR_MORE_BOUND> fw_o{"fw_o"};
57
58 sc_core::sc_export<tlm::scc::pe::intor_bw_nb> bw_i{"bw_i"};
63 cci::cci_param<int> rd_resp_delay{"rd_resp_delay", 0};
68 cci::cci_param<int> wr_resp_delay{"wr_resp_delay", 0};
69
70 void b_transport(payload_type& trans, sc_core::sc_time& t) override;
71
72 tlm::tlm_sync_enum nb_transport_fw(payload_type& trans, phase_type& phase, sc_core::sc_time& t) override;
73
74 bool get_direct_mem_ptr(payload_type& trans, tlm::tlm_dmi& dmi_data) override;
75
76 unsigned int transport_dbg(payload_type& trans) override;
86
87 void set_operation_cb(std::function<unsigned(payload_type& trans)> cb) { operation_cb = cb; }
94 void operation_resp(payload_type& trans, unsigned clk_delay = 0);
100 bool is_active() { return !active_fsm.empty(); }
106 const sc_core::sc_event& tx_finish_event() { return finish_evt; }
107
108 /* overwrite function, defined in axi_bw_transport_if */
109 tlm::tlm_sync_enum nb_transport_bw(payload_type& trans, phase_type& phase, sc_core::sc_time& t) override {
110 SCCTRACE(SCMOD) << " in nb_transport_bw () " ;
111 return socket_bw->nb_transport_bw(trans, phase, t);
112 }
113
114 void invalidate_direct_mem_ptr(sc_dt::uint64 start_range, sc_dt::uint64 end_range) override {}
115
116
117 virtual ~ace_target_pe();
118
124 explicit ace_target_pe(const sc_core::sc_module_name& nm, size_t transfer_width);
125
126 void set_bw_interface(axi::axi_bw_transport_if<axi_protocol_types>* ifs) {socket_bw=ifs;}
127
128 void snoop(payload_type& trans);
129
130protected:
131 ace_target_pe() = delete;
132
133 ace_target_pe(ace_target_pe const&) = delete;
134
135 ace_target_pe(ace_target_pe&&) = delete;
136
137 ace_target_pe& operator=(ace_target_pe const&) = delete;
138
139 ace_target_pe& operator=(ace_target_pe&&) = delete;
140
141 void end_of_elaboration() override;
142
143 void start_of_simulation() override;
144
145 void fsm_clk_method() { process_fsm_clk_queue(); }
149 fsm::fsm_handle* create_fsm_handle() override;
153 void setup_callbacks(fsm::fsm_handle*) override;
154
155 unsigned operations_callback(payload_type& trans);
156
158 std::function<unsigned(payload_type& trans)> operation_cb;
159 sc_core::sc_fifo<payload_type*> rd_resp_fifo{1}, wr_resp_fifo{1};
160
161 sc_core::sc_fifo<std::tuple<fsm::fsm_handle*, axi::fsm::protocol_time_point_e>> wr_resp_beat_fifo{128},
162 rd_resp_beat_fifo{128};
163 scc::ordered_semaphore rd_resp{1}, wr_resp_ch{1}, rd_resp_ch{1};
164
165 sc_core::sc_clock* clk_if{nullptr};
166 std::unique_ptr<bw_intor_impl> bw_intor;
167 std::array<unsigned, 3> outstanding_cnt{{0, 0, 0}}; // count for limiting
168
169 void nb_fw(payload_type& trans, const phase_type& phase) {
170 auto delay = sc_core::SC_ZERO_TIME;
171 base::nb_fw(trans, phase, delay);
172 }
173 tlm_utils::peq_with_cb_and_phase<ace_target_pe> fw_peq{this, &ace_target_pe::nb_fw};
174 std::unordered_set<unsigned> active_rdresp_id;
175
176};
177
178} // namespace pe
179} // namespace axi
void operation_resp(payload_type &trans, unsigned clk_delay=0)
fsm::fsm_handle * create_fsm_handle() override
cci::cci_param< int > wr_resp_delay
the latency between write request and response phase. Will be overwritten by the return of the callba...
cci::cci_param< int > rd_resp_delay
the latency between read request and response phase. Will be overwritten by the return of the callbac...
void set_operation_cb(std::function< unsigned(payload_type &trans)> cb)
Set the operation callback function.
ace_target_pe(const sc_core::sc_module_name &nm, size_t transfer_width)
const sc_core::sc_event & tx_finish_event()
void setup_callbacks(fsm::fsm_handle *) override
protocol engine implementations
TLM2.0 components modeling AHB.
tlm::tlm_bw_transport_if< TYPES > axi_bw_transport_if
alias declaration for the backward interface:
Definition axi_tlm.h:956
tlm::tlm_fw_transport_if< TYPES > ace_fw_transport_if
alias declaration for the ACE forward interface
Definition axi_tlm.h:958
base class of all AXITLM based adapters and interfaces.
Definition base.h:43
void process_fsm_clk_queue()
processes the fsm_clk_queue and triggers the FSM accordingly. Should be registered as rising-edge clo...
Definition base.cpp:107
axi::axi_protocol_types::tlm_payload_type payload_type
aliases used in the class
Definition base.h:45