scc  2022.4.0
SystemC components library
tlm2_lwtr.h
1 /*
2  * Copyright 2022-2023 MINRES Technologies GmbH
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  * http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #pragma once
18 
19 #include "lwtr4tlm2.h"
20 #include <array>
21 #include <cci_configuration>
22 #include <regex>
23 #include <scc/peq.h>
24 #include <sstream>
25 #include <string>
26 #include <sysc/kernel/sc_dynamic_processes.h>
27 #include <tlm/scc/lwtr/lwtr4tlm2_extension_registry.h>
28 #include <tlm/scc/tlm_gp_shared.h>
29 #include <tlm/scc/tlm_mm.h>
30 #include <unordered_map>
31 
33 namespace tlm {
34 namespace scc {
35 namespace lwtr {
36 
37 using tx_db = ::lwtr::tx_db;
38 using tx_fiber = ::lwtr::tx_fiber;
39 template <typename BEGIN = ::lwtr::no_data, typename END = ::lwtr::no_data> using tx_generator = ::lwtr::tx_generator<BEGIN, END>;
40 using tx_handle = ::lwtr::tx_handle;
41 using mm = tlm::scc::tlm_mm<>;
42 
43 extern bool registered;
44 enum tx_rel {
47 };
48 
49 struct link_pred_ext : public tlm::tlm_extension<link_pred_ext> {
50  tlm_extension_base* clone() const override {
51  link_pred_ext* t = new link_pred_ext(this->txHandle, this->creator);
52  return t;
53  }
54  void copy_from(tlm_extension_base const& from) override {
55  txHandle = static_cast<link_pred_ext const&>(from).txHandle;
56  creator = static_cast<link_pred_ext const&>(from).creator;
57  }
58  link_pred_ext(tx_handle handle, void const* creator_)
59  : txHandle(handle)
60  , creator(creator_) {}
61  tx_handle txHandle;
62  void const* creator;
63 };
64 
65 struct nb_rec_entry {
67  tlm::tlm_phase const ph;
68  uintptr_t const id;
69  tx_handle parent;
70 };
71 
80 template <typename TYPES = tlm::tlm_base_protocol_types>
81 class tlm2_lwtr : public virtual tlm::tlm_fw_transport_if<TYPES>, public virtual tlm::tlm_bw_transport_if<TYPES> {
82 public:
84  cci::cci_param<bool> enableBlTracing;
85 
87  cci::cci_param<bool> enableNbTracing;
88 
90  cci::cci_param<bool> enableTimedTracing{"enableTimedTracing", true};
91 
93  cci::cci_param<bool> enableDmiTracing{"enableDmiTracing", false};
94 
105  tlm2_lwtr(bool recording_enabled = true, tx_db* tr_db = tx_db::get_default_db())
106  : tlm2_lwtr(sc_core::sc_gen_unique_name("tlm_recorder"), recording_enabled, tr_db) {}
118  tlm2_lwtr(const char* full_name, bool recording_enabled = true, tx_db* tr_db = tx_db::get_default_db())
119  : enableBlTracing("enableBlTracing", recording_enabled)
120  , enableNbTracing("enableNbTracing", recording_enabled)
121  , full_name(full_name)
122  , nb_timed_peq()
123  , m_db(tr_db) {
124  sc_core::sc_spawn_options opts;
125  opts.spawn_method();
126  opts.dont_initialize();
127  opts.set_sensitivity(&nb_timed_peq.event());
128  sc_core::sc_spawn([this]() { nbtx_cb(); }, nullptr, &opts);
129  initialize_streams();
130  }
131 
132  virtual ~tlm2_lwtr() override {
133  nbtx_req_handle_map.clear();
134  nbtx_last_req_handle_map.clear();
135  delete b_streamHandle;
136  for(auto* p : b_trHandle)
137  delete p; // NOLINT
138  delete b_streamHandleTimed;
139  for(auto* p : b_trTimedHandle)
140  delete p; // NOLINT
141  delete nb_streamHandle;
142  for(auto* p : nb_trHandle)
143  delete p; // NOLINT
144  delete nb_streamHandleTimed;
145  for(auto* p : nb_trTimedHandle)
146  delete p; // NOLINT
147  delete dmi_streamHandle;
148  delete dmi_trGetHandle;
149  delete dmi_trInvalidateHandle;
150  }
151 
152  // TLM-2.0 interface methods for initiator and target sockets, surrounded with
153  // Tx Recording
163  tlm::tlm_sync_enum nb_transport_fw(typename TYPES::tlm_payload_type& trans, typename TYPES::tlm_phase_type& phase,
164  sc_core::sc_time& delay) override;
165 
175  tlm::tlm_sync_enum nb_transport_bw(typename TYPES::tlm_payload_type& trans, typename TYPES::tlm_phase_type& phase,
176  sc_core::sc_time& delay) override;
177 
186  void b_transport(typename TYPES::tlm_payload_type& trans, sc_core::sc_time& delay) override;
194  bool get_direct_mem_ptr(typename TYPES::tlm_payload_type& trans, tlm::tlm_dmi& dmi_data) override;
201  void invalidate_direct_mem_ptr(sc_dt::uint64 start_addr, sc_dt::uint64 end_addr) override;
208  unsigned int transport_dbg(typename TYPES::tlm_payload_type& trans) override;
214  inline bool isRecordingBlockingTxEnabled() const { return m_db && enableBlTracing.get_value(); }
220  inline bool isRecordingNonBlockingTxEnabled() const { return m_db && enableNbTracing.get_value(); }
221 
222 protected:
224  sc_core::sc_port<tlm::tlm_fw_transport_if<TYPES>> fw_port{"fw_port"};
225 
227  sc_core::sc_port<tlm::tlm_bw_transport_if<TYPES>> bw_port{"bw_port"};
228 
229 private:
230  std::string const full_name;
232  ::scc::peq<nb_rec_entry> nb_timed_peq;
237  void nbtx_cb();
239  tx_db* m_db{nullptr};
241  ::lwtr::tx_relation_handle pred_succ_hndl{0}, par_chld_hndl{0};
243  tx_fiber* b_streamHandle{nullptr};
245  std::array<tx_generator<sc_core::sc_time, sc_core::sc_time>*, 3> b_trHandle{{nullptr, nullptr, nullptr}};
247  tx_fiber* b_streamHandleTimed{nullptr};
250  std::array<tx_generator<>*, 3> b_trTimedHandle{{nullptr, nullptr, nullptr}};
251 
252  enum DIR { FW, BW, REQ = FW, RESP = BW };
254  tx_fiber* nb_streamHandle{nullptr};
256  tx_fiber* nb_streamHandleTimed{nullptr};
258  std::array<tx_generator<std::string, std::string>*, 2> nb_trHandle{{nullptr, nullptr}};
260  std::array<tx_generator<>*, 2> nb_trTimedHandle{{nullptr, nullptr}};
261  std::unordered_map<uint64_t, tx_handle> nbtx_req_handle_map;
262  std::unordered_map<uint64_t, tx_handle> nbtx_last_req_handle_map;
263 
265  tx_fiber* dmi_streamHandle{nullptr};
267  tx_generator<>* dmi_trGetHandle{nullptr};
268  tx_generator<sc_dt::uint64, sc_dt::uint64>* dmi_trInvalidateHandle{nullptr};
269 
270 protected:
271  void initialize_streams() {
272  if(m_db) {
273  pred_succ_hndl = m_db->create_relation("PREDECESSOR_SUCCESSOR");
274  par_chld_hndl = m_db->create_relation("PARENT_CHILD");
275  }
276  if(isRecordingBlockingTxEnabled() && !b_streamHandle) {
277  b_streamHandle = new tx_fiber((full_name + "_bl").c_str(), "[TLM][base-protocol][b]", m_db);
278  b_trHandle[tlm::TLM_READ_COMMAND] =
279  new tx_generator<sc_core::sc_time, sc_core::sc_time>("read", *b_streamHandle, "start_delay", "end_delay");
280  b_trHandle[tlm::TLM_WRITE_COMMAND] =
281  new tx_generator<sc_core::sc_time, sc_core::sc_time>("write", *b_streamHandle, "start_delay", "end_delay");
282  b_trHandle[tlm::TLM_IGNORE_COMMAND] =
283  new tx_generator<sc_core::sc_time, sc_core::sc_time>("ignore", *b_streamHandle, "start_delay", "end_delay");
284  if(enableTimedTracing.get_value()) {
285  b_streamHandleTimed = new tx_fiber((full_name + "_bl_timed").c_str(), "[TLM][base-protocol][b][timed]", m_db);
286  b_trTimedHandle[tlm::TLM_READ_COMMAND] = new tx_generator<>("read", *b_streamHandleTimed);
287  b_trTimedHandle[tlm::TLM_WRITE_COMMAND] = new tx_generator<>("write", *b_streamHandleTimed);
288  b_trTimedHandle[tlm::TLM_IGNORE_COMMAND] = new tx_generator<>("ignore", *b_streamHandleTimed);
289  }
290  }
291  if(isRecordingNonBlockingTxEnabled() && !nb_streamHandle) {
292  nb_streamHandle = new tx_fiber((full_name + "_nb").c_str(), "[TLM][base-protocol][nb]", m_db);
293  nb_trHandle[FW] = new tx_generator<std::string, std::string>("fw", *nb_streamHandle, "tlm_phase", "tlm_phase[return_path]");
294  nb_trHandle[BW] = new tx_generator<std::string, std::string>("bw", *nb_streamHandle, "tlm_phase", "tlm_phase[return_path]");
295  if(enableTimedTracing.get_value()) {
296  nb_streamHandleTimed = new tx_fiber((full_name + "_nb_timed").c_str(), "[TLM][base-protocol][nb][timed]", m_db);
297  nb_trTimedHandle[FW] = new tx_generator<>("request", *nb_streamHandleTimed);
298  nb_trTimedHandle[BW] = new tx_generator<>("response", *nb_streamHandleTimed);
299  }
300  }
301  if(m_db && enableDmiTracing.get_value() && !dmi_streamHandle) {
302  dmi_streamHandle = new tx_fiber((full_name + "_dmi").c_str(), "[TLM][base-protocol][dmi]", m_db);
303  dmi_trGetHandle = new tx_generator<>("get", *dmi_streamHandle);
304  dmi_trInvalidateHandle =
305  new tx_generator<sc_dt::uint64, sc_dt::uint64>("invalidate", *dmi_streamHandle, "start_addr", "end_addr");
306  }
307  }
308 
309 private:
310  inline std::string phase2string(const tlm::tlm_phase& p) {
311  std::stringstream ss;
312  ss << p;
313  return ss.str();
314  }
315 };
316 
317 template <unsigned BUSWIDTH = 32, typename TYPES = tlm::tlm_base_protocol_types, int N = 1,
318  sc_core::sc_port_policy POL = sc_core::SC_ONE_OR_MORE_BOUND>
319 class tlm2_lwtr_recorder : public sc_core::sc_module, public tlm2_lwtr<TYPES> {
320 public:
321  tlm::tlm_target_socket<BUSWIDTH, TYPES, N, POL> ts{"ts"};
322  tlm::tlm_initiator_socket<BUSWIDTH, TYPES, N, POL> is{"is"};
323 
324  tlm2_lwtr_recorder(sc_core::sc_module_name nm, bool recording_enabled = true, tx_db* tr_db = tx_db::get_default_db())
325  : sc_core::sc_module(nm)
326  , tlm2_lwtr<TYPES>(name(), recording_enabled, tr_db) {
327  is(*this);
328  ts(*this);
329  this->bw_port(ts.get_base_port());
330  this->fw_port(is.get_base_port());
331  }
332 };
333 
335 // implementations of functions
337 
338 template <typename TYPES> void tlm2_lwtr<TYPES>::b_transport(typename TYPES::tlm_payload_type& trans, sc_core::sc_time& delay) {
339  if(!isRecordingBlockingTxEnabled()) {
340  fw_port->b_transport(trans, delay);
341  return;
342  }
343  // Get a handle for the new transaction
344  tx_handle h = b_trHandle[trans.get_command()]->begin_tx(delay);
345  tx_handle htim;
346  /*************************************************************************
347  * do the timed notification
348  *************************************************************************/
349  if(b_streamHandleTimed)
350  htim = b_trTimedHandle[trans.get_command()]->begin_tx_delayed(sc_core::sc_time_stamp() + delay, par_chld_hndl, h);
351 
352  if(registered)
353  for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
354  if(extensionRecording) {
355  extensionRecording->recordBeginTx(h, trans);
356  if(htim.is_valid())
357  extensionRecording->recordBeginTx(htim, trans);
358  }
359  link_pred_ext* preExt = nullptr;
360 
361  trans.get_extension(preExt);
362  if(preExt == nullptr) { // we are the first recording this transaction
363  preExt = new link_pred_ext(h, this);
364  if(trans.has_mm())
365  trans.set_auto_extension(preExt);
366  else
367  trans.set_extension(preExt);
368  } else {
369  h.add_relation(pred_succ_hndl, preExt->txHandle);
370  }
371  tx_handle preTx{preExt->txHandle};
372  preExt->txHandle = h;
373  fw_port->b_transport(trans, delay);
374  trans.get_extension(preExt);
375  if(preExt->creator == this) {
376  // clean-up the extension if this is the original creator
377  trans.set_extension(static_cast<link_pred_ext*>(nullptr));
378  if(!trans.has_mm()) {
379  delete preExt;
380  }
381  } else {
382  preExt->txHandle = preTx;
383  }
384  h.record_attribute("trans", trans);
385  if(registered)
386  for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
387  if(extensionRecording) {
388  extensionRecording->recordEndTx(h, trans);
389  if(htim.is_active())
390  extensionRecording->recordEndTx(htim, trans);
391  }
392  // End the transaction
393  h.end_tx(delay);
394  // and now the stuff for the timed tx
395  if(htim.is_valid()) {
396  htim.record_attribute("trans", trans);
397  htim.end_tx_delayed(sc_core::sc_time_stamp() + delay);
398  }
399 }
400 
401 template <typename TYPES>
402 tlm::tlm_sync_enum tlm2_lwtr<TYPES>::nb_transport_fw(typename TYPES::tlm_payload_type& trans, typename TYPES::tlm_phase_type& phase,
403  sc_core::sc_time& delay) {
404  if(!isRecordingNonBlockingTxEnabled())
405  return fw_port->nb_transport_fw(trans, phase, delay);
406  /*************************************************************************
407  * prepare recording
408  *************************************************************************/
409  // Get a handle for the new transaction
410  tx_handle h = nb_trHandle[FW]->begin_tx(phase2string(phase));
411  link_pred_ext* preExt = nullptr;
412  trans.get_extension(preExt);
413  if(preExt == nullptr) { // we are the first recording this transaction
414  preExt = new link_pred_ext(h, this);
415  if(trans.has_mm())
416  trans.set_auto_extension(preExt);
417  else
418  trans.set_extension(preExt);
419  } else {
420  // link handle if we have a predecessor
421  h.add_relation(pred_succ_hndl, preExt->txHandle);
422  }
423  // update the extension
424  preExt->txHandle = h;
425  h.record_attribute("delay", delay);
426  if(registered)
427  for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
428  if(extensionRecording)
429  extensionRecording->recordBeginTx(h, trans);
430  /*************************************************************************
431  * do the timed notification
432  *************************************************************************/
433  if(nb_streamHandleTimed) {
434  nb_rec_entry rec{mm::get().allocate(), phase, reinterpret_cast<uint64_t>(&trans), h};
435  rec.tr->deep_copy_from(trans);
436  nb_timed_peq.notify(rec, delay);
437  }
438  /*************************************************************************
439  * do the access
440  *************************************************************************/
441  tlm::tlm_sync_enum status = fw_port->nb_transport_fw(trans, phase, delay);
442  /*************************************************************************
443  * handle recording
444  *************************************************************************/
445  h.record_attribute("tlm_sync", status);
446  h.record_attribute("delay[return_path]", delay);
447  h.record_attribute("trans", trans);
448  if(registered)
449  for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
450  if(extensionRecording)
451  extensionRecording->recordEndTx(h, trans);
452  // get the extension and free the memory if it was mine
453  if(status == tlm::TLM_COMPLETED || (status == tlm::TLM_ACCEPTED && phase == tlm::END_RESP)) {
454  trans.get_extension(preExt);
455  if(preExt && preExt->creator == this) {
456  trans.set_extension(static_cast<link_pred_ext*>(nullptr));
457  if(!trans.has_mm()) {
458  delete preExt;
459  }
460  }
461  /*************************************************************************
462  * do the timed notification if req. finished here
463  *************************************************************************/
464  if(nb_streamHandleTimed) {
465  nb_rec_entry rec{mm::get().allocate(), phase, reinterpret_cast<uint64_t>(&trans), h};
466  rec.tr->deep_copy_from(trans);
467  nb_timed_peq.notify(rec, delay);
468  }
469  } else if(nb_streamHandleTimed && status == tlm::TLM_UPDATED) {
470  nb_rec_entry rec{mm::get().allocate(), phase, reinterpret_cast<uint64_t>(&trans), h};
471  rec.tr->deep_copy_from(trans);
472  nb_timed_peq.notify(rec, delay);
473  }
474  // End the transaction
475  nb_trHandle[FW]->end_tx(h, phase2string(phase));
476  return status;
477 }
478 
479 template <typename TYPES>
480 tlm::tlm_sync_enum tlm2_lwtr<TYPES>::nb_transport_bw(typename TYPES::tlm_payload_type& trans, typename TYPES::tlm_phase_type& phase,
481  sc_core::sc_time& delay) {
482  if(!isRecordingNonBlockingTxEnabled())
483  return bw_port->nb_transport_bw(trans, phase, delay);
484  /*************************************************************************
485  * prepare recording
486  *************************************************************************/
487  link_pred_ext* preExt = nullptr;
488  trans.get_extension(preExt);
489  // Get a handle for the new transaction
490  tx_handle h = nb_trHandle[BW]->begin_tx(phase2string(phase));
491  // link handle if we have a predecessor and that's not ourself
492  if(preExt) {
493  h.add_relation(pred_succ_hndl, preExt->txHandle);
494  // and set the extension handle to this transaction
495  preExt->txHandle = h;
496  }
497  // and set the extension handle to this transaction
498  h.record_attribute("delay", delay);
499  for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
500  if(extensionRecording)
501  extensionRecording->recordBeginTx(h, trans);
502  /*************************************************************************
503  * do the timed notification
504  *************************************************************************/
505  if(nb_streamHandleTimed) {
506  nb_rec_entry rec{mm::get().allocate(), phase, reinterpret_cast<uint64_t>(&trans), h};
507  rec.tr->deep_copy_from(trans);
508  nb_timed_peq.notify(rec, delay);
509  }
510  /*************************************************************************
511  * do the access
512  *************************************************************************/
513  tlm::tlm_sync_enum status = bw_port->nb_transport_bw(trans, phase, delay);
514  /*************************************************************************
515  * handle recording
516  *************************************************************************/
517  h.record_attribute("tlm_sync", status);
518  h.record_attribute("delay[return_path]", delay);
519  h.record_attribute("trans", trans);
520  if(registered)
521  for(auto& extensionRecording : lwtr4tlm2_extension_registry<TYPES>::inst().get())
522  if(extensionRecording)
523  extensionRecording->recordEndTx(h, trans);
524  // End the transaction
525  nb_trHandle[BW]->end_tx(h, phase2string(phase));
526  // get the extension and free the memory if it was mine
527  if(status == tlm::TLM_COMPLETED || (status == tlm::TLM_UPDATED && phase == tlm::END_RESP)) {
528  // the transaction is finished
529  if(preExt && preExt->creator == this) {
530  // clean-up the extension if this is the original creator
531  trans.set_extension(static_cast<link_pred_ext*>(nullptr));
532  if(!trans.has_mm()) {
533  delete preExt;
534  }
535  }
536  /*************************************************************************
537  * do the timed notification if req. finished here
538  *************************************************************************/
539  if(nb_streamHandleTimed) {
540  nb_rec_entry rec{mm::get().allocate(), phase, reinterpret_cast<uint64_t>(&trans), h};
541  rec.tr->deep_copy_from(trans);
542  nb_timed_peq.notify(rec, delay);
543  }
544  }
545  return status;
546 }
547 
548 template <typename TYPES> void tlm2_lwtr<TYPES>::nbtx_cb() {
549  auto opt = nb_timed_peq.get_next();
550  if(opt) {
551  auto& e = opt.get();
552  tx_handle h;
553  switch(e.ph) { // Now process outstanding recordings
554  case tlm::BEGIN_REQ:
555  h = nb_trTimedHandle[REQ]->begin_tx(par_chld_hndl, e.parent);
556  nbtx_req_handle_map[e.id] = h;
557  break;
558  case tlm::END_REQ: {
559  auto it = nbtx_req_handle_map.find(e.id);
560  sc_assert(it != nbtx_req_handle_map.end());
561  h = it->second;
562  nbtx_req_handle_map.erase(it);
563  h.record_attribute("trans", *e.tr);
564  h.end_tx();
565  nbtx_last_req_handle_map[e.id] = h;
566  } break;
567  case tlm::BEGIN_RESP: {
568  auto it = nbtx_req_handle_map.find(e.id);
569  if(it != nbtx_req_handle_map.end()) {
570  h = it->second;
571  nbtx_req_handle_map.erase(it);
572  h.record_attribute("trans", *e.tr);
573  h.end_tx();
574  nbtx_last_req_handle_map[e.id] = h;
575  }
576  h = nb_trTimedHandle[RESP]->begin_tx(par_chld_hndl, e.parent);
577  nbtx_req_handle_map[e.id] = h;
578  it = nbtx_last_req_handle_map.find(e.id);
579  if(it != nbtx_last_req_handle_map.end()) {
580  tx_handle pred = it->second;
581  nbtx_last_req_handle_map.erase(it);
582  h.add_relation(pred_succ_hndl, pred);
583  }
584  } break;
585  case tlm::END_RESP: {
586  auto it = nbtx_req_handle_map.find(e.id);
587  if(it != nbtx_req_handle_map.end()) {
588  h = it->second;
589  nbtx_req_handle_map.erase(it);
590  h.record_attribute("trans", *e.tr);
591  h.end_tx();
592  }
593  } break;
594  default:
595  // sc_assert(!"phase not supported!");
596  break;
597  }
598  }
599  return;
600 }
601 
602 template <typename TYPES> bool tlm2_lwtr<TYPES>::get_direct_mem_ptr(typename TYPES::tlm_payload_type& trans, tlm::tlm_dmi& dmi_data) {
603  if(!(m_db && enableDmiTracing.get_value()))
604  return fw_port->get_direct_mem_ptr(trans, dmi_data);
605  tx_handle h = dmi_trGetHandle->begin_tx();
606  bool status = fw_port->get_direct_mem_ptr(trans, dmi_data);
607  h.record_attribute("trans", trans);
608  h.record_attribute("dmi_data", dmi_data);
609  h.end_tx();
610  return status;
611 }
618 template <typename TYPES> void tlm2_lwtr<TYPES>::invalidate_direct_mem_ptr(sc_dt::uint64 start_addr, sc_dt::uint64 end_addr) {
619  if(!(m_db && enableDmiTracing.get_value())) {
620  bw_port->invalidate_direct_mem_ptr(start_addr, end_addr);
621  return;
622  }
623  tx_handle h = dmi_trInvalidateHandle->begin_tx(start_addr);
624  bw_port->invalidate_direct_mem_ptr(start_addr, end_addr);
625  dmi_trInvalidateHandle->end_tx(h, end_addr);
626  return;
627 }
634 template <typename TYPES> unsigned int tlm2_lwtr<TYPES>::transport_dbg(typename TYPES::tlm_payload_type& trans) {
635  return fw_port->transport_dbg(trans);
636 }
637 } // namespace lwtr
638 } // namespace scc
639 } // namespace tlm
The TLM transaction extensions recorder registry.
The TLM2 transaction recorder.
Definition: tlm2_lwtr.h:81
cci::cci_param< bool > enableNbTracing
the attribute to selectively enable/disable recording of non-blocking protocol tx
Definition: tlm2_lwtr.h:87
void b_transport(typename TYPES::tlm_payload_type &trans, sc_core::sc_time &delay) override
The blocking transport function.
Definition: tlm2_lwtr.h:338
bool isRecordingBlockingTxEnabled() const
get the current state of transaction recording
Definition: tlm2_lwtr.h:214
cci::cci_param< bool > enableDmiTracing
the attribute to selectively enable/disable DMI recording
Definition: tlm2_lwtr.h:93
sc_core::sc_port< tlm::tlm_bw_transport_if< TYPES > > bw_port
the port where bw accesses are forwarded to
Definition: tlm2_lwtr.h:227
void invalidate_direct_mem_ptr(sc_dt::uint64 start_addr, sc_dt::uint64 end_addr) override
The direct memory interface backward function.
Definition: tlm2_lwtr.h:618
bool get_direct_mem_ptr(typename TYPES::tlm_payload_type &trans, tlm::tlm_dmi &dmi_data) override
The direct memory interface forward function.
Definition: tlm2_lwtr.h:602
bool isRecordingNonBlockingTxEnabled() const
get the current state of transaction recording
Definition: tlm2_lwtr.h:220
tlm::tlm_sync_enum nb_transport_fw(typename TYPES::tlm_payload_type &trans, typename TYPES::tlm_phase_type &phase, sc_core::sc_time &delay) override
The non-blocking forward transport function.
Definition: tlm2_lwtr.h:402
unsigned int transport_dbg(typename TYPES::tlm_payload_type &trans) override
The debug transportfunction.
Definition: tlm2_lwtr.h:634
cci::cci_param< bool > enableTimedTracing
the attribute to selectively enable/disable timed recording
Definition: tlm2_lwtr.h:90
sc_core::sc_port< tlm::tlm_fw_transport_if< TYPES > > fw_port
the port where fw accesses are forwarded to
Definition: tlm2_lwtr.h:224
tlm::tlm_sync_enum nb_transport_bw(typename TYPES::tlm_payload_type &trans, typename TYPES::tlm_phase_type &phase, sc_core::sc_time &delay) override
The non-blocking backward transport function.
Definition: tlm2_lwtr.h:480
cci::cci_param< bool > enableBlTracing
the attribute to selectively enable/disable recording of blocking protocol tx
Definition: tlm2_lwtr.h:84
a tlm memory manager
Definition: tlm_mm.h:161
payload_type * allocate()
get a plain tlm_payload_type without extensions
Definition: tlm_mm.h:228
static tlm_mm & get()
accessor function of the singleton
Definition: tlm_mm.h:222
SCC SystemC utilities.
@ PREDECESSOR_SUCCESSOR
Definition: tlm2_lwtr.h:46
SystemC TLM.
priority event queue
Definition: peq.h:41
void notify(const TYPE &entry, const sc_core::sc_time &t)
non-blocking push.
Definition: peq.h:77
boost::optional< TYPE > get_next()
non-blocking get
Definition: peq.h:111
Definition: tlm2_lwtr.h:65