17 #ifndef _SCC_SOCKET_WIDTH_ADAPTER_H_
18 #define _SCC_SOCKET_WIDTH_ADAPTER_H_
25 template <
unsigned int TGT_WIDTH = 32,
unsigned int INTOR_BUSWIDTH = 32,
typename TYPES = tlm::tlm_base_protocol_types,
int N = 1,
26 sc_core::sc_port_policy POL = sc_core::SC_ONE_OR_MORE_BOUND>
27 class socket_width_adapter :
public sc_core::sc_module,
public tlm::tlm_fw_transport_if<TYPES>,
public tlm::tlm_bw_transport_if<TYPES> {
29 using tlm_payload_type =
typename TYPES::tlm_payload_type;
30 using tlm_phase_type =
typename TYPES::tlm_phase_type;
31 using target_socket_type = tlm::tlm_target_socket<TGT_WIDTH, TYPES, N, POL>;
32 using initiator_socket_type = tlm::tlm_initiator_socket<INTOR_BUSWIDTH, TYPES, N, POL>;
34 target_socket_type tsck{
"tsck"};
36 initiator_socket_type isck{
"isck"};
39 : sc_core::sc_module(nm) {
53 tlm::tlm_sync_enum nb_transport_fw(tlm_payload_type& trans, tlm_phase_type& phase, sc_core::sc_time& t)
override {
54 return isck->nb_transport_fw(trans, phase, t);
57 void b_transport(tlm_payload_type& trans, sc_core::sc_time& t)
override { isck->b_transport(trans, t); }
59 bool get_direct_mem_ptr(tlm_payload_type& trans, tlm::tlm_dmi& dmi_data)
override {
return isck->get_direct_mem_ptr(trans, dmi_data); }
61 unsigned int transport_dbg(tlm_payload_type& trans)
override {
return isck->transport_dbg(trans); }
63 tlm::tlm_sync_enum nb_transport_bw(tlm_payload_type& trans, tlm_phase_type& phase, sc_core::sc_time& t)
override {
64 return tsck->nb_transport_bw(trans, phase, t);
67 void invalidate_direct_mem_ptr(sc_dt::uint64 start_range, sc_dt::uint64 end_range)
override {
68 tsck->invalidate_direct_mem_ptr(start_range, end_range);