17 #ifndef _BUS_AHB_PE_TARGET_H_
18 #define _BUS_AHB_PE_TARGET_H_
20 #ifndef SC_INCLUDE_DYNAMIC_PROCESSES
21 #define SC_INCLUDE_DYNAMIC_PROCESSES
24 #include <ahb/ahb_tlm.h>
27 #include <scc/ordered_semaphore.h>
28 #include <unordered_set>
37 class ahb_target_b :
public sc_core::sc_module,
public tlm::tlm_fw_transport_if<tlm::tlm_base_protocol_types> {
41 using payload_type = tlm::tlm_base_protocol_types::tlm_payload_type;
42 using phase_type = tlm::tlm_base_protocol_types::tlm_phase_type;
44 sc_core::sc_in<bool> clk_i{
"clk_i"};
69 void b_transport(payload_type& trans, sc_core::sc_time& t)
override;
71 tlm::tlm_sync_enum nb_transport_fw(payload_type& trans, phase_type& phase, sc_core::sc_time& t)
override;
73 bool get_direct_mem_ptr(payload_type& trans, tlm::tlm_dmi& dmi_data)
override;
75 unsigned int transport_dbg(payload_type& trans)
override;
86 void set_operation_cb(std::function<
unsigned(payload_type& trans)> cb) { operation_cb = cb; }
103 sc_core::sc_port_b<tlm::tlm_bw_transport_if<tlm::tlm_base_protocol_types>>& port,
size_t transfer_width);
115 void send_resp_thread();
117 sc_core::sc_port_b<tlm::tlm_bw_transport_if<tlm::tlm_base_protocol_types>>& socket_bw;
118 sc_core::sc_semaphore sn_sem{1};
119 sc_core::sc_mutex wr, rd, sn;
120 bool fast_resp{
false};
121 bool fast_req{
false};
122 std::function<unsigned(payload_type& trans)> operation_cb;
124 sc_core::sc_clock* clk_if{
nullptr};
125 void end_of_elaboration()
override;
131 template <
unsigned int BUSWIDTH = 32,
typename TYPES = tlm::tlm_base_protocol_types,
int N = 1,
132 sc_core::sc_port_policy POL = sc_core::SC_ONE_OR_MORE_BOUND>
136 using payload_type = base::payload_type;
137 using phase_type = base::phase_type;
142 ahb3_target(tlm::tlm_target_socket<BUSWIDTH, TYPES, N, POL>& socket)
144 ahb3_target(sc_core::sc_gen_unique_name(
"simple_target"), socket) {}
146 ahb3_target(
const sc_core::sc_module_name& nm, tlm::tlm_target_socket<BUSWIDTH, TYPES, N, POL>& socket)
152 ahb3_target() =
delete;
154 ahb3_target(ahb3_target
const&) =
delete;
156 ahb3_target(ahb3_target&&) =
delete;
158 ahb3_target& operator=(ahb3_target
const&) =
delete;
160 ahb3_target& operator=(ahb3_target&&) =
delete;
163 tlm::tlm_target_socket<BUSWIDTH, TYPES, N, POL>& socket;
ahb3_target(tlm::tlm_target_socket< BUSWIDTH, TYPES, N, POL > &socket)
the constructor
void operation_resp(payload_type &trans, bool sync=false)
sc_core::sc_attribute< unsigned > wr_data_accept_delay
the latency between between BEGIN(_PARTIAL)_REQ and END(_PARTIAL)_REQ (AWVALID to AWREADY and WVALID ...
sc_core::sc_attribute< unsigned > rd_resp_delay
the latency between request and response phase. Will be overwritten by the return of the callback fun...
ahb_target_b(const sc_core::sc_module_name &nm, sc_core::sc_port_b< tlm::tlm_bw_transport_if< tlm::tlm_base_protocol_types >> &port, size_t transfer_width)
void set_operation_cb(std::function< unsigned(payload_type &trans)> cb)
Set the operation callback function.
sc_core::sc_attribute< unsigned > rd_data_beat_delay
the latency between between END(_PARTIAL)_RESP and BEGIN(_PARTIAL)_RESP (RREADY to RVALID)
sc_core::sc_attribute< unsigned > rd_addr_accept_delay
the latency between between BEGIN_REQ and END_REQ (ARVALID to ARREADY)
sc_core::sc_attribute< unsigned > wr_resp_delay
the latency between request and response phase. Will be overwritten by the return of the callback fun...
The ordered_semaphore primitive channel class.
TLM2.0 components modeling AHB.