17 #ifndef _BUS_AHB_PE_INITIATOR_H_
18 #define _BUS_AHB_PE_INITIATOR_H_
20 #include <ahb/ahb_tlm.h>
21 #include <scc/ordered_semaphore.h>
24 #include <tlm_utils/peq_with_get.h>
26 #include <unordered_map>
33 class ahb_initiator_b :
public sc_core::sc_module,
public tlm::tlm_bw_transport_if<tlm::tlm_base_protocol_types> {
37 using payload_type = tlm::tlm_generic_payload;
38 using phase_type = tlm::tlm_phase;
40 sc_core::sc_in<bool> clk_i{
"clk_i"};
42 tlm::tlm_sync_enum nb_transport_bw(payload_type& trans, phase_type& phase, sc_core::sc_time& t)
override;
44 void invalidate_direct_mem_ptr(sc_dt::uint64 start_range, sc_dt::uint64 end_range)
override;
46 size_t get_transferwith_in_bytes()
const {
return transfer_width_in_bytes; }
56 void transport(payload_type& trans,
bool blocking);
58 ahb_initiator_b(sc_core::sc_module_name nm, sc_core::sc_port_b<tlm::tlm_fw_transport_if<tlm::tlm_base_protocol_types>>& port,
59 size_t transfer_width,
bool coherent);
73 void snoop_resp(payload_type& trans,
bool sync =
false) {}
76 sc_core::sc_attribute<unsigned>
artv{
"artv", 0};
78 sc_core::sc_attribute<unsigned>
awtv{
"awtv", 0};
80 sc_core::sc_attribute<unsigned>
wbv{
"wbv", 0};
82 sc_core::sc_attribute<unsigned>
rbr{
"rbr", 0};
84 sc_core::sc_attribute<unsigned>
br{
"br", 0};
87 unsigned calculate_beats(payload_type& p) {
88 sc_assert(p.get_data_length() > 0);
89 return p.get_data_length() < transfer_width_in_bytes ? 1 : p.get_data_length() / transfer_width_in_bytes;
92 const size_t transfer_width_in_bytes;
96 sc_core::sc_port_b<tlm::tlm_fw_transport_if<tlm::tlm_base_protocol_types>>& socket_fw;
99 payload_type* active_tx{
nullptr};
103 std::unordered_map<payload_type*, tx_state*> tx_state_by_id;
109 sc_core::sc_event any_tx_finished;
111 sc_core::sc_time clk_period{10, sc_core::SC_NS};
114 sc_core::sc_clock* clk_if{
nullptr};
115 void end_of_elaboration()
override { clk_if =
dynamic_cast<sc_core::sc_clock*
>(clk_i.get_interface()); }
117 tlm::tlm_phase send(payload_type& trans, ahb_initiator_b::tx_state* txs, tlm::tlm_phase phase);
119 unsigned m_clock_counter{0};
120 unsigned m_prev_clk_cnt{0};
126 template <
unsigned int BUSWIDTH = 32,
typename TYPES = tlm::tlm_base_protocol_types,
int N = 1,
127 sc_core::sc_port_policy POL = sc_core::SC_ONE_OR_MORE_BOUND>
132 using payload_type = base::payload_type;
133 using phase_type = base::phase_type;
140 ahb3_initiator(
const sc_core::sc_module_name& nm, tlm::tlm_initiator_socket<BUSWIDTH, TYPES, N, POL>& socket)
157 tlm::tlm_initiator_socket<BUSWIDTH, TYPES, N, POL>& socket;
ahb3_initiator(const sc_core::sc_module_name &nm, tlm::tlm_initiator_socket< BUSWIDTH, TYPES, N, POL > &socket)
the constructor
sc_core::sc_attribute< unsigned > wbv
Write data handshake to next beat valid.
sc_core::sc_attribute< unsigned > artv
Read address valid to next read address valid.
sc_core::sc_attribute< unsigned > br
Write response valid to ready.
sc_core::sc_attribute< unsigned > awtv
Write address valid to next write address valid.
void transport(payload_type &trans, bool blocking)
The forward transport function. It behaves blocking and is re-entrant.
sc_core::sc_attribute< unsigned > rbr
Read data valid to same beat ready.
TLM2.0 components modeling AHB.