scc 2025.09
SystemC components library
tlm_target_bfs.h
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2 * Copyright 2021, 2021 Chair of Electronic Design Automation, TU Munich
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
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8 * http://www.apache.org/licenses/LICENSE-2.0
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11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 *******************************************************************************/
24
25#ifndef __SCC_TLM_TARGET_BFS_H__
26#define __SCC_TLM_TARGET_BFS_H__
27
28#include "tlm_target.h"
29#include <memory>
30#include <tlm_utils/simple_target_socket.h>
31#include <util/ities.h>
32#include <utility>
33#include <vector>
34
35#define ID_SCC_TLM_TARGET_BFS "scc: tlm target bitfield support"
36
37namespace scc {
38
39typedef struct tlm_target_bfs_params {
40 uint64_t base_addr{0};
41 size_t size{0};
42 size_t num_irqs{0};
43 size_t num_regs{0};
44 tlm_target_bfs_params(void)
45 : base_addr()
46 , size()
47 , num_irqs()
48 , num_regs() {}
49 tlm_target_bfs_params(uint64_t base_addr, size_t size, size_t num_irqs, size_t num_regs)
50 : base_addr(base_addr)
51 , size(size)
52 , num_irqs(num_irqs)
53 , num_regs(num_regs) {}
54} tlm_target_bfs_params_t;
55
56template <class owner_t> class tlm_target_bfs_base {
57public:
58 sc_core::sc_in<bool> rst_in_{"reset_in"};
59 std::unique_ptr<std::vector<sc_core::sc_out<bool>>> irq_out_{nullptr};
60
61 tlm_target_bfs_base(tlm_target_bfs_params_t&& params, owner_t* owner = nullptr)
62 : params_{std::move(params)}
63 , owner_{owner} {
64 irq_out_ = util::make_unique<std::vector<sc_core::sc_out<bool>>>(params_.num_irqs);
65 }
66 virtual ~tlm_target_bfs_base() = default;
67
68 const owner_t* getOwner() const { return owner_; }
69
70 void bindIRQ(size_t num, sc_core::sc_signal<bool>* sig) {
71 if(num >= irq_out_->size()) {
72 SC_REPORT_FATAL(ID_SCC_TLM_TARGET_BFS, "not enough IRQs in Per::connectIRQ()");
73 }
74
75 (*irq_out_)[num].bind(*sig);
76 }
77
78protected:
79 const tlm_target_bfs_params_t params_{};
80 owner_t* const owner_{nullptr};
81};
82
90template <typename regs_t, typename owner_t>
91class tlm_target_bfs : public sc_core::sc_module, public tlm_target_bfs_base<owner_t>, public scc::tlm_target<> {
92 SC_HAS_PROCESS(tlm_target_bfs);
93
94public:
95 class socket_accessor {
96 public:
97 constexpr socket_accessor(scc::tlm_target<>& parent) noexcept
98 : parent(parent) {}
99 socket_accessor(const socket_accessor&) = delete;
100 socket_accessor& operator=(const socket_accessor&) = delete;
101
102 tlm::tlm_target_socket<LT>* get() noexcept { return &parent.socket; }
103
104 private:
105 scc::tlm_target<>& parent;
106 };
107
108 using tlm_target_bfs_base<owner_t>::rst_in_;
109
110 tlm_target_bfs(sc_core::sc_module_name name, tlm_target_bfs_params_t&& params, owner_t* owner = nullptr)
111 : sc_core::sc_module{name}
112 , tlm_target_bfs_base<owner_t>{std::move(params), owner}
113 , scc::tlm_target<>{clk}
114 , NAMEDD(regs, regs_t) {
115 regs->registerResources(*this);
116 SC_METHOD(reset_cb);
117 sensitive << rst_in_;
118 }
119
126
127protected:
128 std::unique_ptr<regs_t> regs;
129 sc_core::sc_time clk;
130
131 void reset_cb() {
132 if(rst_in_.read())
133 regs->reset_start();
134 else
135 regs->reset_stop();
136 }
137};
138
139} // namespace scc
140
141#endif // __SCC_TLM_TARGET_BFS_H__
socket_accessor sock_t_
The socket to access the memory mapped registers of this target.
a simple access-width based bus interface (no DMI support)
Definition tlm_target.h:44
SCC TLM utilities.