33class ahb_initiator_b :
public sc_core::sc_module,
public tlm::tlm_bw_transport_if<tlm::tlm_base_protocol_types> {
35#if SYSTEMC_VERSION < 20250221
36 SC_HAS_PROCESS(ahb_initiator_b);
38 using payload_type = tlm::tlm_generic_payload;
39 using phase_type = tlm::tlm_phase;
41 sc_core::sc_in<bool> clk_i{
"clk_i"};
43 tlm::tlm_sync_enum nb_transport_bw(payload_type& trans, phase_type& phase, sc_core::sc_time& t)
override;
45 void invalidate_direct_mem_ptr(sc_dt::uint64 start_range, sc_dt::uint64 end_range)
override;
47 size_t get_transferwith_in_bytes()
const {
return transfer_width_in_bytes; }
57 void transport(payload_type& trans,
bool blocking);
59 ahb_initiator_b(sc_core::sc_module_name nm, sc_core::sc_port_b<tlm::tlm_fw_transport_if<tlm::tlm_base_protocol_types>>& port,
60 size_t transfer_width,
bool coherent);
62 virtual ~ahb_initiator_b();
64 ahb_initiator_b() =
delete;
66 ahb_initiator_b(ahb_initiator_b
const&) =
delete;
68 ahb_initiator_b(ahb_initiator_b&&) =
delete;
70 ahb_initiator_b& operator=(ahb_initiator_b
const&) =
delete;
72 ahb_initiator_b& operator=(ahb_initiator_b&&) =
delete;
74 void snoop_resp(payload_type& trans,
bool sync =
false) {}
77 sc_core::sc_attribute<unsigned>
artv{
"artv", 0};
79 sc_core::sc_attribute<unsigned>
awtv{
"awtv", 0};
81 sc_core::sc_attribute<unsigned>
wbv{
"wbv", 0};
83 sc_core::sc_attribute<unsigned>
rbr{
"rbr", 0};
85 sc_core::sc_attribute<unsigned>
br{
"br", 0};
88 unsigned calculate_beats(payload_type& p) {
89 sc_assert(p.get_data_length() > 0);
90 return p.get_data_length() < transfer_width_in_bytes ? 1 : p.get_data_length() / transfer_width_in_bytes;
93 const size_t transfer_width_in_bytes;
97 sc_core::sc_port_b<tlm::tlm_fw_transport_if<tlm::tlm_base_protocol_types>>& socket_fw;
100 payload_type* active_tx{
nullptr};
104 std::unordered_map<payload_type*, tx_state*> tx_state_by_id;
110 sc_core::sc_event any_tx_finished;
112 sc_core::sc_time clk_period{10, sc_core::SC_NS};
115 sc_core::sc_clock* clk_if{
nullptr};
116 void end_of_elaboration()
override { clk_if =
dynamic_cast<sc_core::sc_clock*
>(clk_i.get_interface()); }
118 tlm::tlm_phase send(payload_type& trans, ahb_initiator_b::tx_state* txs, tlm::tlm_phase phase);
120 unsigned m_clock_counter{0};
121 unsigned m_prev_clk_cnt{0};