scc 2025.09
SystemC components library
ahb_initiator.h
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2 * Copyright 2020-2022 MINRES Technologies GmbH
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
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13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 *******************************************************************************/
16
17#ifndef _BUS_AHB_PE_INITIATOR_H_
18#define _BUS_AHB_PE_INITIATOR_H_
19
20#include <ahb/ahb_tlm.h>
21#include <scc/ordered_semaphore.h>
22#include <scc/peq.h>
23#include <systemc>
24#include <tlm_utils/peq_with_get.h>
25#include <tuple>
26#include <unordered_map>
27
29namespace ahb {
31namespace pe {
32
33class ahb_initiator_b : public sc_core::sc_module, public tlm::tlm_bw_transport_if<tlm::tlm_base_protocol_types> {
34public:
35#if SYSTEMC_VERSION < 20250221
36 SC_HAS_PROCESS(ahb_initiator_b);
37#endif
38 using payload_type = tlm::tlm_generic_payload;
39 using phase_type = tlm::tlm_phase;
40
41 sc_core::sc_in<bool> clk_i{"clk_i"};
42
43 tlm::tlm_sync_enum nb_transport_bw(payload_type& trans, phase_type& phase, sc_core::sc_time& t) override;
44
45 void invalidate_direct_mem_ptr(sc_dt::uint64 start_range, sc_dt::uint64 end_range) override;
46
47 size_t get_transferwith_in_bytes() const { return transfer_width_in_bytes; }
57 void transport(payload_type& trans, bool blocking);
58
59 ahb_initiator_b(sc_core::sc_module_name nm, sc_core::sc_port_b<tlm::tlm_fw_transport_if<tlm::tlm_base_protocol_types>>& port,
60 size_t transfer_width, bool coherent);
61
62 virtual ~ahb_initiator_b();
63
64 ahb_initiator_b() = delete;
65
66 ahb_initiator_b(ahb_initiator_b const&) = delete;
67
68 ahb_initiator_b(ahb_initiator_b&&) = delete;
69
70 ahb_initiator_b& operator=(ahb_initiator_b const&) = delete;
71
72 ahb_initiator_b& operator=(ahb_initiator_b&&) = delete;
73
74 void snoop_resp(payload_type& trans, bool sync = false) {}
75
77 sc_core::sc_attribute<unsigned> artv{"artv", 0};
79 sc_core::sc_attribute<unsigned> awtv{"awtv", 0};
81 sc_core::sc_attribute<unsigned> wbv{"wbv", 0};
83 sc_core::sc_attribute<unsigned> rbr{"rbr", 0};
85 sc_core::sc_attribute<unsigned> br{"br", 0};
86
87protected:
88 unsigned calculate_beats(payload_type& p) {
89 sc_assert(p.get_data_length() > 0);
90 return p.get_data_length() < transfer_width_in_bytes ? 1 : p.get_data_length() / transfer_width_in_bytes;
91 }
92
93 const size_t transfer_width_in_bytes;
94
95 const bool coherent;
96
97 sc_core::sc_port_b<tlm::tlm_fw_transport_if<tlm::tlm_base_protocol_types>>& socket_fw;
98
99 struct tx_state {
100 payload_type* active_tx{nullptr};
102 // scc::ordered_semaphore mtx{1};
103 };
104 std::unordered_map<payload_type*, tx_state*> tx_state_by_id;
105
107
109
110 sc_core::sc_event any_tx_finished;
111
112 sc_core::sc_time clk_period{10, sc_core::SC_NS};
113
114private:
115 sc_core::sc_clock* clk_if{nullptr};
116 void end_of_elaboration() override { clk_if = dynamic_cast<sc_core::sc_clock*>(clk_i.get_interface()); }
117
118 tlm::tlm_phase send(payload_type& trans, ahb_initiator_b::tx_state* txs, tlm::tlm_phase phase);
119
120 unsigned m_clock_counter{0};
121 unsigned m_prev_clk_cnt{0};
122};
123
127template <unsigned int BUSWIDTH = 32, typename TYPES = tlm::tlm_base_protocol_types, int N = 1,
128 sc_core::sc_port_policy POL = sc_core::SC_ONE_OR_MORE_BOUND>
129class ahb3_initiator : public ahb_initiator_b {
130public:
131 using base = ahb_initiator_b;
132
133 using payload_type = base::payload_type;
134 using phase_type = base::phase_type;
141 ahb3_initiator(const sc_core::sc_module_name& nm, tlm::tlm_initiator_socket<BUSWIDTH, TYPES, N, POL>& socket)
142 : ahb_initiator_b(nm, socket.get_base_port(), BUSWIDTH, false)
143 , socket(socket) {
144 socket(*this);
145 }
146
147 ahb3_initiator() = delete;
148
149 ahb3_initiator(ahb3_initiator const&) = delete;
150
151 ahb3_initiator(ahb3_initiator&&) = delete;
152
153 ahb3_initiator& operator=(ahb3_initiator const&) = delete;
154
155 ahb3_initiator& operator=(ahb3_initiator&&) = delete;
156
157private:
158 tlm::tlm_initiator_socket<BUSWIDTH, TYPES, N, POL>& socket;
159};
160
161} /* namespace pe */
162} /* namespace ahb */
163
164#endif /* _BUS_AHB_PE_INITIATOR_H_ */
ahb3_initiator(const sc_core::sc_module_name &nm, tlm::tlm_initiator_socket< BUSWIDTH, TYPES, N, POL > &socket)
the constructor
sc_core::sc_attribute< unsigned > wbv
Write data handshake to next beat valid.
sc_core::sc_attribute< unsigned > artv
Read address valid to next read address valid.
sc_core::sc_attribute< unsigned > br
Write response valid to ready.
sc_core::sc_attribute< unsigned > awtv
Write address valid to next write address valid.
void transport(payload_type &trans, bool blocking)
The forward transport function. It behaves blocking and is re-entrant.
sc_core::sc_attribute< unsigned > rbr
Read data valid to same beat ready.
protocol engine implementations
TLM2.0 components modeling AHB.
Definition ahb_tlm.cpp:19
priority event queue
Definition peq.h:41